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| author | Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> | 2024-12-06 14:13:23 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-12-10 14:02:24 +0300 |
| commit | f962745289958e89bf520407728e384e52ea8e27 (patch) | |
| tree | 584a1a0cce0a2ef5b16d3203683cad5fa461ba55 /scripts/extract-fwblobs | |
| parent | 548f9a3c3eb32dc4e93a947a0d8bd6331bdb8d19 (diff) | |
| download | linux-f962745289958e89bf520407728e384e52ea8e27.tar.xz | |
clk: renesas: r9a08g045: Add clocks, resets and power domain support for the ADC IP
Add clocks, resets and power domains for ADC IP available on the Renesas
RZ/G3S SoC.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/20241206111337.726244-2-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'scripts/extract-fwblobs')
0 files changed, 0 insertions, 0 deletions