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authorMaulik Shah <mkshah@codeaurora.org>2020-11-05 10:38:04 +0300
committerLinus Walleij <linus.walleij@linaro.org>2020-11-10 16:30:42 +0300
commit71266d9d39366c9b24b866d811b3facaf837f13f (patch)
tree83543b7f913392baf9155e3b95a193a074ec8255 /scripts/bpf_helpers_doc.py
parentc64a6a0d4a928c63e5bc3b485552a8903a506c36 (diff)
downloadlinux-71266d9d39366c9b24b866d811b3facaf837f13f.tar.xz
pinctrl: qcom: Move clearing pending IRQ to .irq_request_resources callback
When GPIOs that are routed to PDC are used as output they can still latch the IRQ pending at GIC. As a result the spurious IRQ was handled when the client driver change the direction to input to starts using it as IRQ. Currently such erroneous latched IRQ are cleared with .irq_enable callback however if the driver continue to use GPIO as interrupt and invokes disable_irq() followed by enable_irq() then everytime during enable_irq() previously latched interrupt gets cleared. This can make edge IRQs not seen after enable_irq() if they had arrived after the driver has invoked disable_irq() and were pending at GIC. Move clearing erroneous IRQ to .irq_request_resources callback as this is the place where GPIO direction is changed as input and its locked as IRQ. While at this add a missing check to invoke msm_gpio_irq_clear_unmask() from .irq_enable callback only when GPIO is not routed to PDC. Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy") Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Link: https://lore.kernel.org/r/1604561884-10166-1-git-send-email-mkshah@codeaurora.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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