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authorAdam Ford <aford173@gmail.com>2020-06-03 18:43:29 +0300
committerStephen Boyd <sboyd@kernel.org>2020-06-23 05:04:58 +0300
commit260249f929e81d3d5764117fdd6b9e43eb8fb1d5 (patch)
treee53b6f726cd07e8dc0d2ccdf868deb6f8c9613d2 /scripts/bpf_helpers_doc.py
parent34662f6e30846ae0f82bbc9605deff67781f6616 (diff)
downloadlinux-260249f929e81d3d5764117fdd6b9e43eb8fb1d5.tar.xz
clk: vc5: Enable addition output configurations of the Versaclock
The existing driver is expecting the Versaclock to be pre-programmed, and only sets the output frequency. Unfortunately, not all devices are pre-programmed, and the Versaclock chip has more options beyond just the frequency. This patch enables the following additional features: - Programmable voltage: 1.8V, 2.5V, or 3.3V​ - Slew Percentage of normal: 85%, 90%, or 100% - Output Type: LVPECL, CMOS, HCSL, or LVDS Signed-off-by: Adam Ford <aford173@gmail.com> Link: https://lore.kernel.org/r/20200603154329.31579-3-aford173@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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