diff options
| author | Christian Bruel <christian.bruel@foss.st.com> | 2025-09-02 12:10:45 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2025-09-04 15:52:47 +0300 |
| commit | 2ef3886ce626dcdab0cbc452dbbebc19f57133d8 (patch) | |
| tree | ae2833ef5500057f7768cb0efbe59f545a92996f /rust/helpers/blk.c | |
| parent | d36bf356068cdb5499b9bc458db9149c0fd938a2 (diff) | |
| download | linux-2ef3886ce626dcdab0cbc452dbbebc19f57133d8.tar.xz | |
irqchip/gic-v2m: Handle Multiple MSI base IRQ Alignment
The PCI Local Bus Specification 3.0 (section 6.8.1.6) allows modifying the
low-order bits of the MSI Message DATA register to encode nr_irqs interrupt
numbers in the log2(nr_irqs) bits for the domain.
The problem arises if the base vector (GICV2m base spi) is not aligned with
nr_irqs; in this case, the low-order log2(nr_irqs) bits from the base
vector conflict with the nr_irqs masking, causing the wrong MSI interrupt
to be identified.
To fix this, use bitmap_find_next_zero_area_off() instead of
bitmap_find_free_region() to align the initial base vector with nr_irqs.
Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/all/20250902091045.220847-1-christian.bruel@foss.st.com
Diffstat (limited to 'rust/helpers/blk.c')
0 files changed, 0 insertions, 0 deletions