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authorFabio Estevam <festevam@gmail.com>2018-12-03 20:40:19 +0300
committerShawn Guo <shawnguo@kernel.org>2018-12-10 05:03:04 +0300
commit0c29339d53bf7cf3b96847081ad7f64e835de4d4 (patch)
treebc13d5cd7a3752feb26b0a5df1f6b37ae930aee0 /net/lapb/lapb_timer.c
parentf46af111c6948a842708d68d16564666ea2d1c68 (diff)
downloadlinux-0c29339d53bf7cf3b96847081ad7f64e835de4d4.tar.xz
ARM: dts: imx6ul: Correct mask for GIC PPI interrupts
The GIC_CPU_MASK_SIMPLE() macro should take as its argument the actual number of CPU cores the interrupt controller is wired to. i.MX6UL contains a single Cortex-A7, hence the second interrupt specifier cell for Private Peripheral Interrupts should use "GIC_CPU_MASK_SIMPLE(1)". Tested on a imx6ul-evk. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'net/lapb/lapb_timer.c')
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