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| author | Karol Kolacinski <karol.kolacinski@intel.com> | 2025-03-10 20:44:57 +0300 |
|---|---|---|
| committer | Paolo Abeni <pabeni@redhat.com> | 2025-03-18 12:15:49 +0300 |
| commit | 50f4ffac918e6e77a501ac743f43204b0b15714e (patch) | |
| tree | 272b75080aeb5974c600758770e14e9d01d2d878 /net/lapb/lapb_subr.c | |
| parent | 66a1b7e09fb0daa8052067d99a6ae330e9098389 (diff) | |
| download | linux-50f4ffac918e6e77a501ac743f43204b0b15714e.tar.xz | |
ice: E825C PHY register cleanup
Minor PTP register refactor, including logical grouping E825C 1-step
timestamping registers. Remove unused register definitions
(PHY_REG_GPCS_BITSLIP, PHY_REG_REVISION).
Also, apply preferred GENMASK macro (instead of ICE_M) for register
fields definition affected by this patch.
Reviewed-by: Simon Horman <horms@kernel.org>
Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
Tested-by: Rinitha S <sx.rinitha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Link: https://patch.msgid.link/20250310174502.3708121-5-anthony.l.nguyen@intel.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'net/lapb/lapb_subr.c')
0 files changed, 0 insertions, 0 deletions