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authorMiquel Raynal <miquel.raynal@bootlin.com>2025-03-05 23:09:33 +0300
committerMark Brown <broonie@kernel.org>2025-03-12 18:41:04 +0300
commitcce2200dacd6d7e0501c3811f24f5216710968fb (patch)
tree98ef3bb9fe5085e34fbec9836d9092bfda32b683 /lib/crypto/mpi/mpi-mod.c
parentb8665a1b49f5498edb7b21d730030c06b7348a3c (diff)
downloadlinux-cce2200dacd6d7e0501c3811f24f5216710968fb.tar.xz
spi: cadence-qspi: Improve spi memory performance
I do not know the controller enough to really understand what is happening under the hood, but most of the supported IPs just disable direct access without explicit reason. In practice we observe a significant speed improvement when using indirect mode, some kind of direct mapping, instead of DAC, Direct ACcess. Add the relevant quirk for all boards with the same defaults as AM654 to use INDAC (INDirect ACcess) instead. Speed tests show no change on the write speed on a SPI NAND chip clocked at 25MHz on the AM62A LP SK, but a read speed jumping from 3500kiB/s up to more than 10000kiB/s (approximately x3). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://patch.msgid.link/20250305200933.2512925-3-miquel.raynal@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
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