diff options
| author | Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> | 2025-10-02 00:26:52 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-10-14 11:42:51 +0300 |
| commit | c510368bce39cbaf4cb66f4acf788f5efa8692a6 (patch) | |
| tree | 9cac9d9f1b0a438567c4956bfd2d25498fdda9e1 /include | |
| parent | 3a8660878839faadb4f1a6dd72c3179c1df56787 (diff) | |
| download | linux-c510368bce39cbaf4cb66f4acf788f5efa8692a6.tar.xz | |
dt-bindings: clock: renesas,r9a09g047-cpg: Add USB2 PHY core clocks
Add definitions for USB2 PHY core clocks in the R9A09G047 CPG DT
bindings header file.
Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251001212709.579080-9-tommaso.merciai.xr@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/renesas,r9a09g047-cpg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/renesas,r9a09g047-cpg.h b/include/dt-bindings/clock/renesas,r9a09g047-cpg.h index f165df8a6f5a..dab24740de3c 100644 --- a/include/dt-bindings/clock/renesas,r9a09g047-cpg.h +++ b/include/dt-bindings/clock/renesas,r9a09g047-cpg.h @@ -22,5 +22,7 @@ #define R9A09G047_GBETH_1_CLK_PTP_REF_I 11 #define R9A09G047_USB3_0_REF_ALT_CLK_P 12 #define R9A09G047_USB3_0_CLKCORE 13 +#define R9A09G047_USB2_0_CLK_CORE0 14 +#define R9A09G047_USB2_0_CLK_CORE1 15 #endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G047_CPG_H__ */ |