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| author | Haiyang Zhang <haiyangz@microsoft.com> | 2026-03-17 22:18:06 +0300 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2026-03-19 06:01:10 +0300 |
| commit | c2fe3ff3d66d6f53ec5857c277fae5b3ff9881c1 (patch) | |
| tree | a7eb7ec7a4cbf8cdcac6c786604e33a536d167cf /include | |
| parent | dc3d720e12f602059490c1ab2bfee84a7465998f (diff) | |
| download | linux-c2fe3ff3d66d6f53ec5857c277fae5b3ff9881c1.tar.xz | |
net: mana: Add support for RX CQE Coalescing
Our NIC can have up to 4 RX packets on 1 CQE. To support this feature,
check and process the type CQE_RX_COALESCED_4. The default setting is
disabled, to avoid possible regression on latency.
And, add ethtool handler to switch this feature. To turn it on, run:
ethtool -C <nic> rx-cqe-frames 4
To turn it off:
ethtool -C <nic> rx-cqe-frames 1
The rx-cqe-nsec is the time out value in nanoseconds after the first
packet arrival in a coalesced CQE to be sent. It's read-only for this
NIC.
Reviewed-by: Long Li <longli@microsoft.com>
Signed-off-by: Haiyang Zhang <haiyangz@microsoft.com>
Link: https://patch.msgid.link/20260317191826.1346111-3-haiyangz@linux.microsoft.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/net/mana/mana.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/include/net/mana/mana.h b/include/net/mana/mana.h index a078af283bdd..a7f89e7ddc56 100644 --- a/include/net/mana/mana.h +++ b/include/net/mana/mana.h @@ -378,7 +378,6 @@ struct mana_ethtool_stats { u64 tx_cqe_err; u64 tx_cqe_unknown_type; u64 tx_linear_pkt_cnt; - u64 rx_coalesced_err; u64 rx_cqe_unknown_type; }; @@ -557,6 +556,9 @@ struct mana_port_context { bool port_is_up; bool port_st_save; /* Saved port state */ + u8 cqe_coalescing_enable; + u32 cqe_coalescing_timeout_ns; + struct mana_ethtool_stats eth_stats; struct mana_ethtool_phy_stats phy_stats; @@ -902,6 +904,10 @@ struct mana_cfg_rx_steer_req_v2 { struct mana_cfg_rx_steer_resp { struct gdma_resp_hdr hdr; + + /* V2 */ + u32 cqe_coalescing_timeout_ns; + u32 reserved1; }; /* HW DATA */ /* Register HW vPort */ |