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| author | Sebastian Reichel <sre@kernel.org> | 2017-01-17 01:22:53 +0300 |
|---|---|---|
| committer | Sebastian Reichel <sre@kernel.org> | 2017-01-17 01:22:53 +0300 |
| commit | c0d21f73ae44fd85102ec684b58d9e4f9e78d485 (patch) | |
| tree | 3b8f19a8b71c069782d73ab96a67b9760c0fa93e /include | |
| parent | 9d60595a069b1a71b33dabed8053b378c325cb4a (diff) | |
| parent | 0b0408745e7ff24757cbfd571d69026c0ddb803c (diff) | |
| download | linux-c0d21f73ae44fd85102ec684b58d9e4f9e78d485.tar.xz | |
Merge branch 'psy-arm-at91-immutable' into psy-next
Diffstat (limited to 'include')
| -rw-r--r-- | include/soc/at91/at91sam9_ddrsdr.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/soc/at91/at91sam9_ddrsdr.h b/include/soc/at91/at91sam9_ddrsdr.h index dc10c52e0e91..393362bdb860 100644 --- a/include/soc/at91/at91sam9_ddrsdr.h +++ b/include/soc/at91/at91sam9_ddrsdr.h @@ -81,6 +81,7 @@ #define AT91_DDRSDRC_LPCB_POWER_DOWN 2 #define AT91_DDRSDRC_LPCB_DEEP_POWER_DOWN 3 #define AT91_DDRSDRC_CLKFR (1 << 2) /* Clock Frozen */ +#define AT91_DDRSDRC_LPDDR2_PWOFF (1 << 3) /* LPDDR Power Off */ #define AT91_DDRSDRC_PASR (7 << 4) /* Partial Array Self Refresh */ #define AT91_DDRSDRC_TCSR (3 << 8) /* Temperature Compensated Self Refresh */ #define AT91_DDRSDRC_DS (3 << 10) /* Drive Strength */ @@ -96,7 +97,9 @@ #define AT91_DDRSDRC_MD_SDR 0 #define AT91_DDRSDRC_MD_LOW_POWER_SDR 1 #define AT91_DDRSDRC_MD_LOW_POWER_DDR 3 +#define AT91_DDRSDRC_MD_LPDDR3 5 #define AT91_DDRSDRC_MD_DDR2 6 /* [SAM9 Only] */ +#define AT91_DDRSDRC_MD_LPDDR2 7 #define AT91_DDRSDRC_DBW (1 << 4) /* Data Bus Width */ #define AT91_DDRSDRC_DBW_32BITS (0 << 4) #define AT91_DDRSDRC_DBW_16BITS (1 << 4) |