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authorAkshay Gupta <akshay.gupta@amd.com>2025-04-28 09:30:31 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2025-05-21 15:44:40 +0300
commitbb13a84ed6b78200952b264b4d7a024b730e8246 (patch)
tree8357c610b035a0d5727b24eafbf415bbe8c4b1c2 /include
parent35ac2034db72bbbc73609aab5f05ff6e0d38fdd0 (diff)
downloadlinux-bb13a84ed6b78200952b264b4d7a024b730e8246.tar.xz
misc: amd-sbi: Add support for CPUID protocol
- AMD provides custom protocol to read Processor feature capabilities and configuration information through side band. The information is accessed by providing CPUID Function, extended function and thread ID to the protocol. Undefined function returns 0. Reviewed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com> Signed-off-by: Akshay Gupta <akshay.gupta@amd.com> Link: https://lore.kernel.org/r/20250428063034.2145566-8-akshay.gupta@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include')
-rw-r--r--include/uapi/misc/amd-apml.h37
1 files changed, 37 insertions, 0 deletions
diff --git a/include/uapi/misc/amd-apml.h b/include/uapi/misc/amd-apml.h
index a5f086f84b06..bb57dc75758a 100644
--- a/include/uapi/misc/amd-apml.h
+++ b/include/uapi/misc/amd-apml.h
@@ -25,6 +25,24 @@ struct apml_mbox_msg {
__u32 fw_ret_code;
};
+struct apml_cpuid_msg {
+ /*
+ * CPUID input
+ * [0]...[3] cpuid func,
+ * [4][5] cpuid: thread
+ * [6] cpuid: ext function & read eax/ebx or ecx/edx
+ * [7:0] -> bits [7:4] -> ext function &
+ * bit [0] read eax/ebx or ecx/edx
+ * CPUID output
+ */
+ __u64 cpu_in_out;
+ /*
+ * Status code for CPUID read
+ */
+ __u32 fw_ret_code;
+ __u32 pad;
+};
+
/*
* AMD sideband interface base IOCTL
*/
@@ -48,4 +66,23 @@ struct apml_mbox_msg {
*/
#define SBRMI_IOCTL_MBOX_CMD _IOWR(SB_BASE_IOCTL_NR, 0, struct apml_mbox_msg)
+/**
+ * DOC: SBRMI_IOCTL_CPUID_CMD
+ *
+ * @Parameters
+ *
+ * @struct apml_cpuid_msg
+ * Pointer to the &struct apml_cpuid_msg that will contain the protocol
+ * information
+ *
+ * @Description
+ * IOCTL command for APML messages using generic _IOWR
+ * The IOCTL provides userspace access to AMD sideband cpuid protocol
+ * - CPUID protocol to get CPU details for Function/Ext Function
+ * at thread level
+ * - returning "-EFAULT" if none of the above
+ * "-EPROTOTYPE" error is returned to provide additional error details
+ */
+#define SBRMI_IOCTL_CPUID_CMD _IOWR(SB_BASE_IOCTL_NR, 1, struct apml_cpuid_msg)
+
#endif /*_AMD_APML_H_*/