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| author | Judith Mendez <jm@ti.com> | 2026-02-09 20:23:29 +0300 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2026-05-05 14:06:02 +0300 |
| commit | b0ea5175358f0872ffdc9c6073585637dc01815a (patch) | |
| tree | d62b31be955e6818bea1367ccb0a7be97bd3372e /include | |
| parent | 254f49634ee16a731174d2ae34bc50bd5f45e731 (diff) | |
| download | linux-b0ea5175358f0872ffdc9c6073585637dc01815a.tar.xz | |
dt-bindings: hwinfo: ti,k3-socinfo: Add nvmem-cells support
Add optional nvmem-cells and nvmem-cell-names properties to support
reading silicon revision information from alternate location using
NVMEM providers. This is used on AM62P to read GP_SW1 register for
accurate silicon revision detection.
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260209172330.53623-2-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions