diff options
| author | Paolo Bonzini <pbonzini@redhat.com> | 2025-10-18 11:25:31 +0300 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2025-10-18 11:25:31 +0300 |
| commit | 5d26eaae15fb5c190164362a3e19081935574efc (patch) | |
| tree | d5b6f42250d390b9f232c53c84da3ecce1bc80aa /include | |
| parent | 3a8660878839faadb4f1a6dd72c3179c1df56787 (diff) | |
| parent | ca88ecdce5f51874a7c151809bd2c936ee0d3805 (diff) | |
| download | linux-5d26eaae15fb5c190164362a3e19081935574efc.tar.xz | |
Merge tag 'kvmarm-fixes-6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm64 fixes for 6.18, take #1
Improvements and bug fixes:
- Fix the handling of ZCR_EL2 in NV VMs
(20250926194108.84093-1-oliver.upton@linux.dev)
- Pick the correct translation regime when doing a PTW on
the back of a SEA (20250926224246.731748-1-oliver.upton@linux.dev)
- Prevent userspace from injecting an event into a vcpu that isn't
initialised yet (20250930085237.108326-1-oliver.upton@linux.dev)
- Move timer save/restore to the sysreg handling code, fixing EL2 timer
access in the process (20250929160458.3351788-1-maz@kernel.org)
- Add FGT-based trapping of MDSCR_EL1 to reduce the overhead of debug
(20250924235150.617451-1-oliver.upton@linux.dev)
- Fix trapping configuration when the host isn't GICv3
(20251007160704.1673584-1-sascha.bischoff@arm.com)
- Improve the detection of HCR_EL2.E2H being RES1
(20251009121239.29370-1-maz@kernel.org)
- Drop a spurious 'break' statement in the S1 PTW
(20250930135621.162050-1-osama.abdelkader@gmail.com)
- Don't try to access SPE when owned by EL3
(20251010174707.1684200-1-mukesh.ojha@oss.qualcomm.com)
Documentation updates:
- Document the failure modes of event injection
(20250930233620.124607-1-oliver.upton@linux.dev)
- Document that a GICv3 guest can be created on a GICv5 host
with FEAT_GCIE_LEGACY (20251007154848.1640444-1-sascha.bischoff@arm.com)
Selftest improvements:
- Add a selftest for the effective value of HCR_EL2.AMO
(20250926224454.734066-1-oliver.upton@linux.dev)
- Address build warning in the timer selftest when building
with clang (20250926155838.2612205-1-seanjc@google.com)
- Teach irq_fd selftests about non-x86 architectures
(20250930193301.119859-1-oliver.upton@linux.dev)
- Add missing sysregs to the set_id_regs selftest
(20251012154352.61133-1-zenghui.yu@linux.dev)
- Fix vcpu allocation in the vgic_lpi_stress selftest
(20251008154520.54801-1-zenghui.yu@linux.dev)
- Correctly enable interrupts in the vgic_lpi_stress selftest
(20251007195254.260539-1-oliver.upton@linux.dev)
Diffstat (limited to 'include')
| -rw-r--r-- | include/kvm/arm_arch_timer.h | 24 |
1 files changed, 16 insertions, 8 deletions
diff --git a/include/kvm/arm_arch_timer.h b/include/kvm/arm_arch_timer.h index 681cf0c8b9df..7310841f4512 100644 --- a/include/kvm/arm_arch_timer.h +++ b/include/kvm/arm_arch_timer.h @@ -51,8 +51,6 @@ struct arch_timer_vm_data { }; struct arch_timer_context { - struct kvm_vcpu *vcpu; - /* Emulated Timer (may be unused) */ struct hrtimer hrtimer; u64 ns_frac; @@ -71,6 +69,9 @@ struct arch_timer_context { bool level; } irq; + /* Who am I? */ + enum kvm_arch_timers timer_id; + /* Duplicated state from arch_timer.c for convenience */ u32 host_timer_irq; }; @@ -106,9 +107,6 @@ void kvm_timer_vcpu_terminate(struct kvm_vcpu *vcpu); void kvm_timer_init_vm(struct kvm *kvm); -u64 kvm_arm_timer_get_reg(struct kvm_vcpu *, u64 regid); -int kvm_arm_timer_set_reg(struct kvm_vcpu *, u64 regid, u64 value); - int kvm_arm_timer_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); int kvm_arm_timer_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); int kvm_arm_timer_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); @@ -127,9 +125,9 @@ void kvm_timer_init_vhe(void); #define vcpu_hvtimer(v) (&(v)->arch.timer_cpu.timers[TIMER_HVTIMER]) #define vcpu_hptimer(v) (&(v)->arch.timer_cpu.timers[TIMER_HPTIMER]) -#define arch_timer_ctx_index(ctx) ((ctx) - vcpu_timer((ctx)->vcpu)->timers) - -#define timer_vm_data(ctx) (&(ctx)->vcpu->kvm->arch.timer_data) +#define arch_timer_ctx_index(ctx) ((ctx)->timer_id) +#define timer_context_to_vcpu(ctx) container_of((ctx), struct kvm_vcpu, arch.timer_cpu.timers[(ctx)->timer_id]) +#define timer_vm_data(ctx) (&(timer_context_to_vcpu(ctx)->kvm->arch.timer_data)) #define timer_irq(ctx) (timer_vm_data(ctx)->ppi[arch_timer_ctx_index(ctx)]) u64 kvm_arm_timer_read_sysreg(struct kvm_vcpu *vcpu, @@ -178,4 +176,14 @@ static inline u64 timer_get_offset(struct arch_timer_context *ctxt) return offset; } +static inline void timer_set_offset(struct arch_timer_context *ctxt, u64 offset) +{ + if (!ctxt->offset.vm_offset) { + WARN(offset, "timer %d\n", arch_timer_ctx_index(ctxt)); + return; + } + + WRITE_ONCE(*ctxt->offset.vm_offset, offset); +} + #endif |
