Merge tag 'samsung-dt64-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt

Samsung DTS ARM64 changes for v6.15

1. Google GS101:
 - Disable GSA core pinctrl because its registers are not available for
   normal world.
 - Add APM (Active Power Management) mailbox and the ACPM firmware nodes.
 - Add new boards: Google Pixel 6 Pro (Raven).
 - Enable framebuffer and reboot-mode.

2. Exynos990:
 - Add PERIS clock controller, MCT timer

3. Exynos8895:
 - Define all remaining serial engine (USI) and syscon nodes, add MMC.
 - Enable microSD and touchsreen on Samsung Galaxy S8 (dreamlte).

4. ExynosAutov920: Add UFS and CPU cache information.

5. Various cleanups.

This includes two topic branches with DT bindings, which might be shared
with other trees depending on needs:
1. for-v6.15/samsung-clk-dt-bindings with Exynos990 clock controller
   header constants.
2. for-v6.15/samsung-soc-dt-bindings with Exynos USI serial engines
   header constants rework.

* tag 'samsung-dt64-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (25 commits)
  arm64: dts: tesla: Change labels to lower-case
  arm64: dts: exynos: gs101: Change labels to lower-case
  arm64: dts: exynosautov920: add ufs phy for ExynosAutov920 SoC
  arm64: dts: exynosautov920: add CPU cache information
  arm64: dts: exynos: gs101: add ACPM protocol node
  arm64: dts: exynos: gs101: add AP to APM mailbox node
  arm64: dts: exynos: gs101: add SRAM node
  arm64: dts: exynos: gs101: add reboot-mode support (SYSIP_DAT0)
  arm64: dts: exynos: gs101: align poweroff writes with downstream
  arm64: dts: exynos: gs101: drop explicit regmap from reboot nodes
  arm64: dts: exynos8895: Rename PMU nodes to fixup sorting
  arm64: dts: exynos8895-dreamlte: enable support for the touchscreen
  arm64: dts: exynos8895-dreamlte: enable support for microSD storage
  arm64: dts: exynos8895: add a node for mmc
  arm64: dts: exynos8895: define all usi nodes
  arm64: dts: exynos8895: add syscon nodes for peric0/1 and fsys0/1
  arm64: dts: exynos990: Rename and sort PMU nodes
  arm64: dts: exynos990: Add CMU_PERIS and MCT nodes
  dt-bindings: soc: samsung: usi: add USIv1 and samsung,exynos8895-usi
  dt-bindings: clock: exynos990: Add CMU_PERIS block
  ...

Link: https://lore.kernel.org/r/20250309185601.10616-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

2 files changed, 34 insertions, 4 deletions

diff --git a/include/dt-bindings/clock/samsung,exynos990.h b/include/dt-bindings/clock/samsung,exynos990.h
index 307215a3f3ed..6b9df09d2822 100644
--- a/include/dt-bindings/clock/samsung,exynos990.h
+++ b/include/dt-bindings/clock/samsung,exynos990.h
@@ -233,4 +233,25 @@
 #define CLK_GOUT_HSI0_CMU_HSI0_PCLK			21
 #define CLK_GOUT_HSI0_XIU_D_HSI0_ACLK			22
 
+/* CMU_PERIS */
+#define CLK_MOUT_PERIS_BUS_USER			1
+#define CLK_MOUT_PERIS_CLK_PERIS_GIC		2
+#define CLK_GOUT_PERIS_SYSREG_PERIS_PCLK	3
+#define CLK_GOUT_PERIS_WDT_CLUSTER2_PCLK	4
+#define CLK_GOUT_PERIS_WDT_CLUSTER0_PCLK	5
+#define CLK_CLK_PERIS_PERIS_CMU_PERIS_PCLK	6
+#define CLK_GOUT_PERIS_CLK_PERIS_BUSP_CLK	7
+#define CLK_GOUT_PERIS_CLK_PERIS_OSCCLK_CLK	8
+#define CLK_GOUT_PERIS_CLK_PERIS_GIC_CLK	9
+#define CLK_GOUT_PERIS_AD_AXI_P_PERIS_ACLKM	10
+#define CLK_GOUT_PERIS_OTP_CON_BIRA_PCLK	11
+#define CLK_GOUT_PERIS_GIC_CLK			12
+#define CLK_GOUT_PERIS_LHM_AXI_P_PERIS_CLK	13
+#define CLK_GOUT_PERIS_MCT_PCLK			14
+#define CLK_GOUT_PERIS_OTP_CON_TOP_PCLK		15
+#define CLK_GOUT_PERIS_D_TZPC_PERIS_PCLK	16
+#define CLK_GOUT_PERIS_TMU_TOP_PCLK		17
+#define CLK_GOUT_PERIS_OTP_CON_BIRA_OSCCLK	18
+#define CLK_GOUT_PERIS_OTP_CON_TOP_OSCCLK	19
+
 #endif
diff --git a/include/dt-bindings/soc/samsung,exynos-usi.h b/include/dt-bindings/soc/samsung,exynos-usi.h
index a01af169d249..b46de214dd09 100644
--- a/include/dt-bindings/soc/samsung,exynos-usi.h
+++ b/include/dt-bindings/soc/samsung,exynos-usi.h
@@ -9,9 +9,18 @@
 #ifndef __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H
 #define __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H
 
-#define USI_V2_NONE		0
-#define USI_V2_UART		1
-#define USI_V2_SPI		2
-#define USI_V2_I2C		3
+#define USI_MODE_NONE		0
+#define USI_MODE_UART		1
+#define USI_MODE_SPI		2
+#define USI_MODE_I2C		3
+#define USI_MODE_I2C1		4
+#define USI_MODE_I2C0_1		5
+#define USI_MODE_UART_I2C1	6
+
+/* Deprecated */
+#define USI_V2_NONE		USI_MODE_NONE
+#define USI_V2_UART		USI_MODE_UART
+#define USI_V2_SPI		USI_MODE_SPI
+#define USI_V2_I2C		USI_MODE_I2C
 
 #endif /* __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H */