diff options
| author | Leo Yan <leo.yan@arm.com> | 2026-05-15 23:08:18 +0300 |
|---|---|---|
| committer | Suzuki K Poulose <suzuki.poulose@arm.com> | 2026-05-18 12:18:45 +0300 |
| commit | 4d8dd98ee5bf9f77862cce039adfcdccd02daa08 (patch) | |
| tree | 488f2cf2d5ab811e983d24457f190377fcc36303 /include | |
| parent | d79125cc3622680c9f2880acacae3981b4bcf08c (diff) | |
| download | linux-4d8dd98ee5bf9f77862cce039adfcdccd02daa08.tar.xz | |
coresight: Register CPU PM notifier in core layer
The current implementation only saves and restores the context for ETM
sources while ignoring the context of links. However, if funnels or
replicators on a linked path resides in a CPU or cluster power domain,
the hardware context for the link will be lost after resuming from low
power states.
To support context management for links during CPU low power modes, a
better way is to implement CPU PM callbacks in the Arm CoreSight core
layer. As the core layer has sufficient information for linked paths,
from tracers to links, which can be used for power management.
As a first step, this patch registers CPU PM notifier in the core layer.
If a source device provides callbacks for saving and restoring context,
these callbacks will be invoked in CPU suspend and resume.
Reviewed-by: James Clark <james.clark@linaro.org>
Tested-by: James Clark <james.clark@linaro.org>
Reviewed-by: Yeoreum Yun <yeoreum.yun@arm.com>
Tested-by: Jie Gan <jie.gan@oss.qualcomm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20260515-arm_coresight_path_power_management_improvement-v14-11-f88c4a3ecfe9@arm.com
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/coresight.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/coresight.h b/include/linux/coresight.h index e9c20ceb9016..5f9d7ea9f594 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -438,6 +438,8 @@ struct coresight_ops_panic { struct coresight_ops { int (*trace_id)(struct coresight_device *csdev, enum cs_mode mode, struct coresight_device *sink); + int (*pm_save_disable)(struct coresight_device *csdev); + void (*pm_restore_enable)(struct coresight_device *csdev); const struct coresight_ops_sink *sink_ops; const struct coresight_ops_link *link_ops; const struct coresight_ops_source *source_ops; |
