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| author | Arnd Bergmann <arnd@arndb.de> | 2025-01-16 17:01:58 +0300 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2025-01-16 17:01:58 +0300 |
| commit | 36ad66238ea50c1c288c6c9988daec735d3e1f22 (patch) | |
| tree | be9e2cbe2034269acfe2a70c90d42f1b2219095b /include | |
| parent | 9f98a04da87b7715c365d3239f7e2969e29dfc6e (diff) | |
| parent | 8715c91a836502929c637c76a26335ede8818acf (diff) | |
| download | linux-36ad66238ea50c1c288c6c9988daec735d3e1f22.tar.xz | |
Merge tag 'sunxi-dt-for-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt
Allwinner Device Tree changes for 6.14
- Add support for DMA engine and audio codec on F1C100s
and enable audio codec on Lichee Pi Nano
- Add syscon and SRAM nodes for A100
- Enable CPU DVFS for Tanix TX1
- Explicitly configure TCON0 pixel clock parent according to display
output used
This includes one commit shared with the clock tree
dt-bindings: clock: sunxi: Export PLL_VIDEO_2X and PLL_MIPI
which adds the macros for the TCON0 pixel clock parents.
* tag 'sunxi-dt-for-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: a64: explicitly assign clock parent for TCON0
dt-bindings: clock: sunxi: Export PLL_VIDEO_2X and PLL_MIPI
arm64: dts: allwinner: h313: enable DVFS for Tanix TX1
arm64: dts: allwinner: a100: Add syscon nodes
dt-bindings: sram: sunxi-sram: Add A100 compatible
ARM: dts: suniv: f1c100s: Activate Audio Codec for Lichee Pi Nano
ARM: dts: suniv: f1c100s: Add support for Audio Codec
ARM: dts: suniv: f1c100s: Add support for DMA
Link: https://lore.kernel.org/r/Z36h2FwUxro8rouO@wens.tw
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/sun50i-a64-ccu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h index 175892189e9d..4f220ea7a23c 100644 --- a/include/dt-bindings/clock/sun50i-a64-ccu.h +++ b/include/dt-bindings/clock/sun50i-a64-ccu.h @@ -44,7 +44,9 @@ #define _DT_BINDINGS_CLK_SUN50I_A64_H_ #define CLK_PLL_VIDEO0 7 +#define CLK_PLL_VIDEO0_2X 8 #define CLK_PLL_PERIPH0 11 +#define CLK_PLL_MIPI 17 #define CLK_CPUX 21 #define CLK_BUS_MIPI_DSI 28 |