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| author | Jakub Kicinski <kuba@kernel.org> | 2024-04-06 07:54:46 +0300 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2024-04-06 07:54:46 +0300 |
| commit | 30a22b8cd98d8456bcb704d68d100d1e7b9843dc (patch) | |
| tree | 51b4967adab8f26b1ce17efad8cfea3530c35a0b /include | |
| parent | da48a65f3ff4155364fb9e3efe0bfba58291da6b (diff) | |
| parent | 958f56e4838579544fbc5183073518c7c4d22d44 (diff) | |
| download | linux-30a22b8cd98d8456bcb704d68d100d1e7b9843dc.tar.xz | |
Merge branch 'mlx5e-rc2-misc-patches'
Tariq Toukan says:
====================
mlx5e rc2 misc patches (part)
This patchset includes small features and a cleanup for the mlx5e driver.
Patches 1-2 by Cosmin implements FEC settings for 100G/lane modes.
Patch 3 is a simple cleanup.
====================
Link: https://lore.kernel.org/r/20240404173357.123307-1-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index cc159d8563d1..35ffc9b9f241 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -9817,7 +9817,21 @@ struct mlx5_ifc_pplm_reg_bits { u8 fec_override_admin_100g_2x[0x10]; u8 fec_override_admin_50g_1x[0x10]; - u8 reserved_at_140[0x140]; + u8 fec_override_cap_800g_8x[0x10]; + u8 fec_override_cap_400g_4x[0x10]; + + u8 fec_override_cap_200g_2x[0x10]; + u8 fec_override_cap_100g_1x[0x10]; + + u8 reserved_at_180[0xa0]; + + u8 fec_override_admin_800g_8x[0x10]; + u8 fec_override_admin_400g_4x[0x10]; + + u8 fec_override_admin_200g_2x[0x10]; + u8 fec_override_admin_100g_1x[0x10]; + + u8 reserved_at_260[0x20]; }; struct mlx5_ifc_ppcnt_reg_bits { @@ -10189,7 +10203,9 @@ struct mlx5_ifc_mtutc_reg_bits { }; struct mlx5_ifc_pcam_enhanced_features_bits { - u8 reserved_at_0[0x68]; + u8 reserved_at_0[0x48]; + u8 fec_100G_per_lane_in_pplm[0x1]; + u8 reserved_at_49[0x1f]; u8 fec_50G_per_lane_in_pplm[0x1]; u8 reserved_at_69[0x4]; u8 rx_icrc_encapsulated_counter[0x1]; |