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| author | Ketan Patil <ketanp@nvidia.com> | 2026-02-26 19:31:13 +0300 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2026-03-07 20:02:29 +0300 |
| commit | 2e4cfaa78eb98d2623367818c859225c6b6bf701 (patch) | |
| tree | 3ff03fe09d939793b3d6cd7b15655eecdbf98604 /include | |
| parent | 4d865a2374037d2d0842f88822fd753f0918b370 (diff) | |
| download | linux-2e4cfaa78eb98d2623367818c859225c6b6bf701.tar.xz | |
memory: tegra: Group SoC specific fields
Introduce new SoC specific fields in tegra_mc_soc struct for high
address mask and error status type mask because Tegra264 has different
values for these than the existing devices. Error status registers
e.g. MC_ERR_STATUS_0 has few bits which indicate the type of the
error. In order to obtain such type of error from error status
register, we use error status type mask. Similarly, these error status
registers have bits which indicate the higher address bits of the
address responsible for mc error. In order to obtain such higher
address, we use high address mask. Make this change to prepare for
adding MC interrupt support for Tegra264.
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://patch.msgid.link/20260226163115.1152181-5-ketanp@nvidia.com
[krzk: Fix checkpatch warning]
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/soc/tegra/mc.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h index d07de04c0f33..b9b1763b10b5 100644 --- a/include/soc/tegra/mc.h +++ b/include/soc/tegra/mc.h @@ -217,6 +217,8 @@ struct tegra_mc_soc { const irq_handler_t *handle_irq; unsigned int num_interrupts; + unsigned int mc_addr_hi_mask; + unsigned int mc_err_status_type_mask; }; struct tegra_mc { |