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authorStephen Boyd <sboyd@kernel.org>2025-05-23 01:21:43 +0300
committerStephen Boyd <sboyd@kernel.org>2025-05-23 01:21:43 +0300
commit29c98b13921eb15548954f18bf5d96b6e62d69de (patch)
tree97d8b2525f2e361e488a715dc5f377cd92f2bb16 /include
parent0af2f6be1b4281385b618cb86ad946eded089ac8 (diff)
parent50d4b157fa96bfeb4f383d7dad80f8bdef0d1d2a (diff)
downloadlinux-29c98b13921eb15548954f18bf5d96b6e62d69de.tar.xz
Merge tag 'thead-clk-for-v6.16' of https://github.com/pdp7/linux into clk-thead
Pull T-HEAD clk driver updates from Drew Fustini: - Clk driver for Video Output (VO) subsystem in the T-HEAD TH1520 SoC * tag 'thead-clk-for-v6.16' of https://github.com/pdp7/linux: clk: thead: Add clock support for VO subsystem in T-HEAD TH1520 SoC dt-bindings: clock: thead: Add TH1520 VO clock controller
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/clock/thead,th1520-clk-ap.h34
1 files changed, 34 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/thead,th1520-clk-ap.h b/include/dt-bindings/clock/thead,th1520-clk-ap.h
index a199784b3512..09a9aa7b3ab1 100644
--- a/include/dt-bindings/clock/thead,th1520-clk-ap.h
+++ b/include/dt-bindings/clock/thead,th1520-clk-ap.h
@@ -93,4 +93,38 @@
#define CLK_SRAM3 83
#define CLK_PLL_GMAC_100M 84
#define CLK_UART_SCLK 85
+
+/* VO clocks */
+#define CLK_AXI4_VO_ACLK 0
+#define CLK_GPU_MEM 1
+#define CLK_GPU_CORE 2
+#define CLK_GPU_CFG_ACLK 3
+#define CLK_DPU_PIXELCLK0 4
+#define CLK_DPU_PIXELCLK1 5
+#define CLK_DPU_HCLK 6
+#define CLK_DPU_ACLK 7
+#define CLK_DPU_CCLK 8
+#define CLK_HDMI_SFR 9
+#define CLK_HDMI_PCLK 10
+#define CLK_HDMI_CEC 11
+#define CLK_MIPI_DSI0_PCLK 12
+#define CLK_MIPI_DSI1_PCLK 13
+#define CLK_MIPI_DSI0_CFG 14
+#define CLK_MIPI_DSI1_CFG 15
+#define CLK_MIPI_DSI0_REFCLK 16
+#define CLK_MIPI_DSI1_REFCLK 17
+#define CLK_HDMI_I2S 18
+#define CLK_X2H_DPU1_ACLK 19
+#define CLK_X2H_DPU_ACLK 20
+#define CLK_AXI4_VO_PCLK 21
+#define CLK_IOPMP_VOSYS_DPU_PCLK 22
+#define CLK_IOPMP_VOSYS_DPU1_PCLK 23
+#define CLK_IOPMP_VOSYS_GPU_PCLK 24
+#define CLK_IOPMP_DPU1_ACLK 25
+#define CLK_IOPMP_DPU_ACLK 26
+#define CLK_IOPMP_GPU_ACLK 27
+#define CLK_MIPIDSI0_PIXCLK 28
+#define CLK_MIPIDSI1_PIXCLK 29
+#define CLK_HDMI_PIXCLK 30
+
#endif