Merge tag 'edac_updates_for_v7.1_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras

Pull EDAC updates from Borislav Petkov:

 - amd64_edac: Add support for AMD Zen 3 (family 19h, models 40h–4fh)

 - i10nm: Add GNR error information decoder support as an alternative to
   the firmware decoder

 - versalnet: Restructure the init/teardown logic for correct and more
   readable error handling. Also, fix two memory leaks and a resource
   leak

 - Convert several internal structs to use bounded flex arrays, enabling
   the kernel's runtime checker to catch out-of-bounds memory accesses

 - Mark various sysfs attribute tables read-only, preventing accidental
   modification at runtime

 - The usual fixes and cleanups across the subsystem

* tag 'edac_updates_for_v7.1_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
  EDAC/mc: Use kzalloc_flex()
  EDAC/ie31200: Make rpl_s_cfg static
  EDAC/i10nm: Fix spelling mistake "readd" -> "read"
  EDAC/versalnet: Fix device_node leak in mc_probe()
  EDAC/versalnet: Fix memory leak in remove and probe error paths
  EDAC/amd64: Add support for family 19h, models 40h-4fh
  EDAC/i10nm: Add driver decoder for Granite Rapids server
  EDAC/sb: Use kzalloc_flex()
  EDAC/i7core: Use kzalloc_flex()
  EDAC/mpc85xx: Constify device sysfs attributes
  EDAC/device: Allow addition of const sysfs attributes
  EDAC/pci_sysfs: Constify instance sysfs attributes
  EDAC/device: Constify info sysfs attributes
  EDAC/device: Drop unnecessary and dangerous casts of attributes
  EDAC/device: Drop unused macro to_edacdev_attr()
  EDAC/altera: Drop unused field eccmgr_sysfs_attr
  EDAC/versalnet: Refactor memory controller initialization and cleanup

1 files changed, 12 insertions, 11 deletions

diff --git a/include/linux/edac.h b/include/linux/edac.h
index fa32f2aca22f..deba46b3ee25 100644
--- a/include/linux/edac.h
+++ b/include/linux/edac.h
@@ -541,17 +541,6 @@ struct mem_ctl_info {
 	struct csrow_info **csrows;
 	unsigned int nr_csrows, num_cschannel;
 
-	/*
-	 * Memory Controller hierarchy
-	 *
-	 * There are basically two types of memory controller: the ones that
-	 * sees memory sticks ("dimms"), and the ones that sees memory ranks.
-	 * All old memory controllers enumerate memories per rank, but most
-	 * of the recent drivers enumerate memories per DIMM, instead.
-	 * When the memory controller is per rank, csbased is true.
-	 */
-	unsigned int n_layers;
-	struct edac_mc_layer *layers;
 	bool csbased;
 
 	/*
@@ -609,6 +598,18 @@ struct mem_ctl_info {
 	u8 fake_inject_layer[EDAC_MAX_LAYERS];
 	bool fake_inject_ue;
 	u16 fake_inject_count;
+
+	/*
+	 * Memory Controller hierarchy
+	 *
+	 * There are basically two types of memory controller: the ones that
+	 * sees memory sticks ("dimms"), and the ones that sees memory ranks.
+	 * All old memory controllers enumerate memories per rank, but most
+	 * of the recent drivers enumerate memories per DIMM, instead.
+	 * When the memory controller is per rank, csbased is true.
+	 */
+	unsigned int n_layers;
+	struct edac_mc_layer layers[] __counted_by(n_layers);
 };
 
 #define mci_for_each_dimm(mci, dimm)				\