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| author | Mark Brown <broonie@kernel.org> | 2025-05-09 12:06:17 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2025-05-09 12:06:17 +0300 |
| commit | 09fd04daed0746d8e77ed2327f26c671ce49023c (patch) | |
| tree | d2240a6213535df8e40eb544aa269b40f97ff55b /include | |
| parent | 9fbae052f6f68056fd84e8ba096a7e9ab3464f3d (diff) | |
| parent | b0b8d3aeadb5c49bf78305a1bc844e5a9378257c (diff) | |
| download | linux-09fd04daed0746d8e77ed2327f26c671ce49023c.tar.xz | |
Add RZ/G3E xSPI support
Merge series from Biju Das <biju.das.jz@bp.renesas.com>:
The xSPI IP found on RZ/G3E SoC similar to RPC-IF interface, but it
can support writes on memory-mapped area. Even though the registers are
different, the rpcif driver code can be reused for xSPI by adding wrapper
functions.
Diffstat (limited to 'include')
| -rw-r--r-- | include/memory/renesas-rpc-if.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/memory/renesas-rpc-if.h b/include/memory/renesas-rpc-if.h index b8fa30fd6b50..53663c4e5ae3 100644 --- a/include/memory/renesas-rpc-if.h +++ b/include/memory/renesas-rpc-if.h @@ -61,12 +61,14 @@ enum rpcif_type { RPCIF_RCAR_GEN3, RPCIF_RCAR_GEN4, RPCIF_RZ_G2L, + XSPI_RZ_G3E, }; struct rpcif { struct device *dev; void __iomem *dirmap; size_t size; + bool xspi; }; int rpcif_sw_init(struct rpcif *rpc, struct device *dev); @@ -75,5 +77,7 @@ void rpcif_prepare(struct device *dev, const struct rpcif_op *op, u64 *offs, size_t *len); int rpcif_manual_xfer(struct device *dev); ssize_t rpcif_dirmap_read(struct device *dev, u64 offs, size_t len, void *buf); +ssize_t xspi_dirmap_write(struct device *dev, u64 offs, size_t len, + const void *buf); #endif // __RENESAS_RPC_IF_H |