diff options
| author | Val Packett <val@packett.cool> | 2026-03-03 06:41:21 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-03-11 23:44:18 +0300 |
| commit | 0221b14be8aae98d687efab066133a114bea02d8 (patch) | |
| tree | 1beebc156773d918c75d0dd003a12b89105b9576 /include | |
| parent | a5c7b4fc8405846c613e7a01805a77d2e0cb75bd (diff) | |
| download | linux-0221b14be8aae98d687efab066133a114bea02d8.tar.xz | |
dt-bindings: clock: qcom,dispcc-sm6125: Define MDSS resets
Add the missing defines for MDSS resets, which are necessary to reset
the display subsystem in order to avoid issues caused by state left over
from the bootloader.
While here, align comment style with other SoCs.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Val Packett <val@packett.cool>
Link: https://lore.kernel.org/r/20260303034847.13870-3-val@packett.cool
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/qcom,dispcc-sm6125.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/qcom,dispcc-sm6125.h b/include/dt-bindings/clock/qcom,dispcc-sm6125.h index 4ff974f4fcc3..f58b85d2c814 100644 --- a/include/dt-bindings/clock/qcom,dispcc-sm6125.h +++ b/include/dt-bindings/clock/qcom,dispcc-sm6125.h @@ -6,6 +6,7 @@ #ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6125_H #define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6125_H +/* Clocks */ #define DISP_CC_PLL0 0 #define DISP_CC_MDSS_AHB_CLK 1 #define DISP_CC_MDSS_AHB_CLK_SRC 2 @@ -35,7 +36,10 @@ #define DISP_CC_MDSS_VSYNC_CLK_SRC 26 #define DISP_CC_XO_CLK 27 -/* DISP_CC GDSCR */ +/* Resets */ +#define DISP_CC_MDSS_CORE_BCR 0 + +/* GDSCs */ #define MDSS_GDSC 0 #endif |