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| author | Vinod Koul <vkoul@kernel.org> | 2018-12-31 17:01:42 +0300 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2018-12-31 17:01:42 +0300 |
| commit | 010299bfc2df19c2c330c75c048805939e5ab91b (patch) | |
| tree | 077dbb9274da3b36bcbbe4dcfc18f93ac0590074 /include | |
| parent | 466e601a68da7554da84e87d81dac74608deedbe (diff) | |
| parent | 7b0c03ecc42fb223baf015877fee9d517c2c8af1 (diff) | |
| download | linux-010299bfc2df19c2c330c75c048805939e5ab91b.tar.xz | |
Merge branch 'topic/dw' into for-linus
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/dma/dw-dmac.h | 14 | ||||
| -rw-r--r-- | include/linux/platform_data/dma-dw.h | 6 |
2 files changed, 20 insertions, 0 deletions
diff --git a/include/dt-bindings/dma/dw-dmac.h b/include/dt-bindings/dma/dw-dmac.h new file mode 100644 index 000000000000..d1ca705c95b3 --- /dev/null +++ b/include/dt-bindings/dma/dw-dmac.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ + +#ifndef __DT_BINDINGS_DMA_DW_DMAC_H__ +#define __DT_BINDINGS_DMA_DW_DMAC_H__ + +/* + * Protection Control bits provide protection against illegal transactions. + * The protection bits[0:2] are one-to-one mapped to AHB HPROT[3:1] signals. + */ +#define DW_DMAC_HPROT1_PRIVILEGED_MODE (1 << 0) /* Privileged Mode */ +#define DW_DMAC_HPROT2_BUFFERABLE (1 << 1) /* DMA is bufferable */ +#define DW_DMAC_HPROT3_CACHEABLE (1 << 2) /* DMA is cacheable */ + +#endif /* __DT_BINDINGS_DMA_DW_DMAC_H__ */ diff --git a/include/linux/platform_data/dma-dw.h b/include/linux/platform_data/dma-dw.h index 896cb71a382c..1a1d58ebffbf 100644 --- a/include/linux/platform_data/dma-dw.h +++ b/include/linux/platform_data/dma-dw.h @@ -49,6 +49,7 @@ struct dw_dma_slave { * @data_width: Maximum data width supported by hardware per AHB master * (in bytes, power of 2) * @multi_block: Multi block transfers supported by hardware per channel. + * @protctl: Protection control signals setting per channel. */ struct dw_dma_platform_data { unsigned int nr_channels; @@ -65,6 +66,11 @@ struct dw_dma_platform_data { unsigned char nr_masters; unsigned char data_width[DW_DMA_MAX_NR_MASTERS]; unsigned char multi_block[DW_DMA_MAX_NR_CHANNELS]; +#define CHAN_PROTCTL_PRIVILEGED BIT(0) +#define CHAN_PROTCTL_BUFFERABLE BIT(1) +#define CHAN_PROTCTL_CACHEABLE BIT(2) +#define CHAN_PROTCTL_MASK GENMASK(2, 0) + unsigned char protctl; }; #endif /* _PLATFORM_DATA_DMA_DW_H */ |