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authorJakub Kicinski <kuba@kernel.org>2025-06-12 20:08:24 +0300
committerJakub Kicinski <kuba@kernel.org>2025-06-12 20:09:10 +0300
commit535de528015b56e34a40a8e1eb1629fadf809a84 (patch)
treef0287cdc9d13798b0e723541f51d1dfd8c99c50c /include/uapi
parent5d6d67c4cb10a4b4d3ae35758d5eeed6239afdc8 (diff)
parent27605c8c0f69e319df156b471974e4e223035378 (diff)
downloadlinux-535de528015b56e34a40a8e1eb1629fadf809a84.tar.xz
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Cross-merge networking fixes after downstream PR (net-6.16-rc2). No conflicts or adjacent changes. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'include/uapi')
-rw-r--r--include/uapi/drm/xe_drm.h5
-rw-r--r--include/uapi/linux/input-event-codes.h3
-rw-r--r--include/uapi/linux/tiocl.h1
-rw-r--r--include/uapi/linux/ublk_cmd.h9
-rw-r--r--include/uapi/linux/vt.h11
-rw-r--r--include/uapi/misc/amd-apml.h152
6 files changed, 180 insertions, 1 deletions
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 9c08738c3b91..6a702ba7817c 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -1210,6 +1210,11 @@ struct drm_xe_vm_bind {
* there is no need to explicitly set that. When a queue of type
* %DRM_XE_PXP_TYPE_HWDRM is created, the PXP default HWDRM session
* (%XE_PXP_HWDRM_DEFAULT_SESSION) will be started, if isn't already running.
+ * The user is expected to query the PXP status via the query ioctl (see
+ * %DRM_XE_DEVICE_QUERY_PXP_STATUS) and to wait for PXP to be ready before
+ * attempting to create a queue with this property. When a queue is created
+ * before PXP is ready, the ioctl will return -EBUSY if init is still in
+ * progress or -EIO if init failed.
* Given that going into a power-saving state kills PXP HWDRM sessions,
* runtime PM will be blocked while queues of this type are alive.
* All PXP queues will be killed if a PXP invalidation event occurs.
diff --git a/include/uapi/linux/input-event-codes.h b/include/uapi/linux/input-event-codes.h
index 5a199f3d4a26..3b2524e4b667 100644
--- a/include/uapi/linux/input-event-codes.h
+++ b/include/uapi/linux/input-event-codes.h
@@ -925,7 +925,8 @@
#define SW_MUTE_DEVICE 0x0e /* set = device disabled */
#define SW_PEN_INSERTED 0x0f /* set = pen inserted */
#define SW_MACHINE_COVER 0x10 /* set = cover closed */
-#define SW_MAX 0x10
+#define SW_USB_INSERT 0x11 /* set = USB audio device connected */
+#define SW_MAX 0x11
#define SW_CNT (SW_MAX+1)
/*
diff --git a/include/uapi/linux/tiocl.h b/include/uapi/linux/tiocl.h
index b32acc229024..88faba506c3d 100644
--- a/include/uapi/linux/tiocl.h
+++ b/include/uapi/linux/tiocl.h
@@ -36,5 +36,6 @@ struct tiocl_selection {
#define TIOCL_BLANKSCREEN 14 /* keep screen blank even if a key is pressed */
#define TIOCL_BLANKEDSCREEN 15 /* return which vt was blanked */
#define TIOCL_GETKMSGREDIRECT 17 /* get the vt the kernel messages are restricted to */
+#define TIOCL_GETBRACKETEDPASTE 18 /* get whether paste may be bracketed */
#endif /* _LINUX_TIOCL_H */
diff --git a/include/uapi/linux/ublk_cmd.h b/include/uapi/linux/ublk_cmd.h
index 56c7e3fc666f..77d9d6af46da 100644
--- a/include/uapi/linux/ublk_cmd.h
+++ b/include/uapi/linux/ublk_cmd.h
@@ -272,6 +272,15 @@
*/
#define UBLK_F_QUIESCE (1ULL << 12)
+/*
+ * If this feature is set, ublk_drv supports each (qid,tag) pair having
+ * its own independent daemon task that is responsible for handling it.
+ * If it is not set, daemons are per-queue instead, so for two pairs
+ * (qid1,tag1) and (qid2,tag2), if qid1 == qid2, then the same task must
+ * be responsible for handling (qid1,tag1) and (qid2,tag2).
+ */
+#define UBLK_F_PER_IO_DAEMON (1ULL << 13)
+
/* device state */
#define UBLK_S_DEV_DEAD 0
#define UBLK_S_DEV_LIVE 1
diff --git a/include/uapi/linux/vt.h b/include/uapi/linux/vt.h
index e9d39c48520a..e5b0c492aa18 100644
--- a/include/uapi/linux/vt.h
+++ b/include/uapi/linux/vt.h
@@ -2,6 +2,8 @@
#ifndef _UAPI_LINUX_VT_H
#define _UAPI_LINUX_VT_H
+#include <linux/ioctl.h>
+#include <linux/types.h>
/*
* These constants are also useful for user-level apps (e.g., VC
@@ -84,4 +86,13 @@ struct vt_setactivate {
#define VT_SETACTIVATE 0x560F /* Activate and set the mode of a console */
+/* get console size and cursor position */
+struct vt_consizecsrpos {
+ __u16 con_rows; /* number of console rows */
+ __u16 con_cols; /* number of console columns */
+ __u16 csr_row; /* current cursor's row */
+ __u16 csr_col; /* current cursor's column */
+};
+#define VT_GETCONSIZECSRPOS _IOR('V', 0x10, struct vt_consizecsrpos)
+
#endif /* _UAPI_LINUX_VT_H */
diff --git a/include/uapi/misc/amd-apml.h b/include/uapi/misc/amd-apml.h
new file mode 100644
index 000000000000..745b3338fc06
--- /dev/null
+++ b/include/uapi/misc/amd-apml.h
@@ -0,0 +1,152 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ * Copyright (C) 2021-2024 Advanced Micro Devices, Inc.
+ */
+#ifndef _AMD_APML_H_
+#define _AMD_APML_H_
+
+#include <linux/types.h>
+
+/* Mailbox data size for data_in and data_out */
+#define AMD_SBI_MB_DATA_SIZE 4
+
+struct apml_mbox_msg {
+ /*
+ * Mailbox Message ID
+ */
+ __u32 cmd;
+ /*
+ * [0]...[3] mailbox 32bit input/output data
+ */
+ __u32 mb_in_out;
+ /*
+ * Error code is returned in case of soft mailbox error
+ */
+ __u32 fw_ret_code;
+};
+
+struct apml_cpuid_msg {
+ /*
+ * CPUID input
+ * [0]...[3] cpuid func,
+ * [4][5] cpuid: thread
+ * [6] cpuid: ext function & read eax/ebx or ecx/edx
+ * [7:0] -> bits [7:4] -> ext function &
+ * bit [0] read eax/ebx or ecx/edx
+ * CPUID output
+ */
+ __u64 cpu_in_out;
+ /*
+ * Status code for CPUID read
+ */
+ __u32 fw_ret_code;
+ __u32 pad;
+};
+
+struct apml_mcamsr_msg {
+ /*
+ * MCAMSR input
+ * [0]...[3] mca msr func,
+ * [4][5] thread
+ * MCAMSR output
+ */
+ __u64 mcamsr_in_out;
+ /*
+ * Status code for MCA/MSR access
+ */
+ __u32 fw_ret_code;
+ __u32 pad;
+};
+
+struct apml_reg_xfer_msg {
+ /*
+ * RMI register address offset
+ */
+ __u16 reg_addr;
+ /*
+ * Register data for read/write
+ */
+ __u8 data_in_out;
+ /*
+ * Register read or write
+ */
+ __u8 rflag;
+};
+
+/*
+ * AMD sideband interface base IOCTL
+ */
+#define SB_BASE_IOCTL_NR 0xF9
+
+/**
+ * DOC: SBRMI_IOCTL_MBOX_CMD
+ *
+ * @Parameters
+ *
+ * @struct apml_mbox_msg
+ * Pointer to the &struct apml_mbox_msg that will contain the protocol
+ * information
+ *
+ * @Description
+ * IOCTL command for APML messages using generic _IOWR
+ * The IOCTL provides userspace access to AMD sideband mailbox protocol
+ * - Mailbox message read/write(0x0~0xFF)
+ * - returning "-EFAULT" if none of the above
+ * "-EPROTOTYPE" error is returned to provide additional error details
+ */
+#define SBRMI_IOCTL_MBOX_CMD _IOWR(SB_BASE_IOCTL_NR, 0, struct apml_mbox_msg)
+
+/**
+ * DOC: SBRMI_IOCTL_CPUID_CMD
+ *
+ * @Parameters
+ *
+ * @struct apml_cpuid_msg
+ * Pointer to the &struct apml_cpuid_msg that will contain the protocol
+ * information
+ *
+ * @Description
+ * IOCTL command for APML messages using generic _IOWR
+ * The IOCTL provides userspace access to AMD sideband cpuid protocol
+ * - CPUID protocol to get CPU details for Function/Ext Function
+ * at thread level
+ * - returning "-EFAULT" if none of the above
+ * "-EPROTOTYPE" error is returned to provide additional error details
+ */
+#define SBRMI_IOCTL_CPUID_CMD _IOWR(SB_BASE_IOCTL_NR, 1, struct apml_cpuid_msg)
+
+/**
+ * DOC: SBRMI_IOCTL_MCAMSR_CMD
+ *
+ * @Parameters
+ *
+ * @struct apml_mcamsr_msg
+ * Pointer to the &struct apml_mcamsr_msg that will contain the protocol
+ * information
+ *
+ * @Description
+ * IOCTL command for APML messages using generic _IOWR
+ * The IOCTL provides userspace access to AMD sideband MCAMSR protocol
+ * - MCAMSR protocol to get MCA bank details for Function at thread level
+ * - returning "-EFAULT" if none of the above
+ * "-EPROTOTYPE" error is returned to provide additional error details
+ */
+#define SBRMI_IOCTL_MCAMSR_CMD _IOWR(SB_BASE_IOCTL_NR, 2, struct apml_mcamsr_msg)
+
+/**
+ * DOC: SBRMI_IOCTL_REG_XFER_CMD
+ *
+ * @Parameters
+ *
+ * @struct apml_reg_xfer_msg
+ * Pointer to the &struct apml_reg_xfer_msg that will contain the protocol
+ * information
+ *
+ * @Description
+ * IOCTL command for APML messages using generic _IOWR
+ * The IOCTL provides userspace access to AMD sideband register xfer protocol
+ * - Register xfer protocol to get/set hardware register for given offset
+ */
+#define SBRMI_IOCTL_REG_XFER_CMD _IOWR(SB_BASE_IOCTL_NR, 3, struct apml_reg_xfer_msg)
+
+#endif /*_AMD_APML_H_*/