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authorDavid S. Miller <davem@davemloft.net>2021-04-08 23:15:34 +0300
committerDavid S. Miller <davem@davemloft.net>2021-04-08 23:15:34 +0300
commit9ba7ffa6d8a3bccb2ac8d87bf0f0bd6dd24db391 (patch)
tree567f8e236d869182fd04096abcdd7bc277b87b47 /include/uapi/linux
parent3cd52c1e32fe7dfee09815ced702db9ee9f84ec9 (diff)
parent9187b6cfe7fcc6f2f5330e82768652bc4931ffb3 (diff)
downloadlinux-9ba7ffa6d8a3bccb2ac8d87bf0f0bd6dd24db391.tar.xz
Merge branch 'marvell10g-updates'
Marek BehĂșn says: ==================== net: phy: marvell10g updates Here are some updates for marvell10g PHY driver. I am still working on some more changes for this driver, but I would like to have at least something reviewed / applied. Changes since v3: - added Andrew's Reviewed-by tags - removed patches adding variadic-macro library and bitmap initialization macro - it causes warning that we are not currently able to fix easily. Instead the supported_interfaces bitmap is now initialized via a chip specific method - added explanation of mactype initialization to commit message of patch 07/16 - fixed repeated word in commit message of second to last patch Changes since v2: - code refactored to use an additional structure mv3310_chip describing mv3310 specific properties / operations for PHYs supported by this driver - added separate phy_driver structures for 88X3340 and 88E2111 - removed 88E2180 specific code (dual-port and quad-port SXGMII modes are ignored for now) Changes since v1: - added various MACTYPEs support also for 88E21XX - differentiate between specific models with same PHY_ID - better check for compatible interface - print exact model ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/uapi/linux')
-rw-r--r--include/uapi/linux/mdio.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/uapi/linux/mdio.h b/include/uapi/linux/mdio.h
index 3f302e2523b2..bdf77dffa5a4 100644
--- a/include/uapi/linux/mdio.h
+++ b/include/uapi/linux/mdio.h
@@ -120,6 +120,8 @@
#define MDIO_PMA_SPEED_100 0x0020 /* 100M capable */
#define MDIO_PMA_SPEED_10 0x0040 /* 10M capable */
#define MDIO_PCS_SPEED_10P2B 0x0002 /* 10PASS-TS/2BASE-TL capable */
+#define MDIO_PCS_SPEED_2_5G 0x0040 /* 2.5G capable */
+#define MDIO_PCS_SPEED_5G 0x0080 /* 5G capable */
/* Device present registers. */
#define MDIO_DEVS_PRESENT(devad) (1 << (devad))