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authorDmytro Maluka <dmaluka@chromium.org>2026-01-22 04:48:52 +0300
committerJoerg Roedel <joerg.roedel@amd.com>2026-01-22 11:20:29 +0300
commit22d169bdd2849fe6bd18c2643742e1c02be6451c (patch)
treea55216041e57d1e4345fb019f93007b67cd3d861 /include/uapi/linux/errqueue.h
parent10e60d87813989e20eac1f3eda30b3bae461e7f9 (diff)
downloadlinux-22d169bdd2849fe6bd18c2643742e1c02be6451c.tar.xz
iommu/vt-d: Flush cache for PASID table before using it
When writing the address of a freshly allocated zero-initialized PASID table to a PASID directory entry, do that after the CPU cache flush for this PASID table, not before it, to avoid the time window when this PASID table may be already used by non-coherent IOMMU hardware while its contents in RAM is still some random old data, not zero-initialized. Fixes: 194b3348bdbb ("iommu/vt-d: Fix PASID directory pointer coherency") Signed-off-by: Dmytro Maluka <dmaluka@chromium.org> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Link: https://lore.kernel.org/r/20251221123508.37495-1-dmaluka@chromium.org Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'include/uapi/linux/errqueue.h')
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