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authorLucas De Marchi <lucas.demarchi@intel.com>2025-08-12 15:58:37 +0300
committerLucas De Marchi <lucas.demarchi@intel.com>2025-08-12 15:58:37 +0300
commitca994e8922f25f7fed2075098f185cf198109eaa (patch)
treeb400201be96c4ddedc9d864b30da039df32e8df9 /include/net/aligned_data.h
parent30e0c3f43a414616e0b6ca76cf7f7b2cd387e1d4 (diff)
parent8f5ae30d69d7543eee0d70083daf4de8fe15d585 (diff)
downloadlinux-ca994e8922f25f7fed2075098f185cf198109eaa.tar.xz
Merge drm/drm-next into drm-xe-next
Bring v6.17-rc1 to propagate commits from other subsystems, particularly PCI, which has some new functions needed for SR-IOV integration. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Diffstat (limited to 'include/net/aligned_data.h')
-rw-r--r--include/net/aligned_data.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/include/net/aligned_data.h b/include/net/aligned_data.h
new file mode 100644
index 000000000000..e1a1c8aedc79
--- /dev/null
+++ b/include/net/aligned_data.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+#ifndef _NET_ALIGNED_DATA_H
+#define _NET_ALIGNED_DATA_H
+
+#include <linux/atomic.h>
+#include <linux/types.h>
+
+/* Structure holding cacheline aligned fields on SMP builds.
+ * Each field or group should have an ____cacheline_aligned_in_smp
+ * attribute to ensure no accidental false sharing can happen.
+ */
+struct net_aligned_data {
+ atomic64_t net_cookie ____cacheline_aligned_in_smp;
+#if defined(CONFIG_INET)
+ atomic_long_t tcp_memory_allocated ____cacheline_aligned_in_smp;
+ atomic_long_t udp_memory_allocated ____cacheline_aligned_in_smp;
+#endif
+};
+
+extern struct net_aligned_data net_aligned_data;
+
+#endif /* _NET_ALIGNED_DATA_H */