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| author | Jakub Kicinski <kuba@kernel.org> | 2024-11-03 19:39:12 +0300 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2024-11-03 19:39:12 +0300 |
| commit | f07a6e6ceb054001888e101d74036633e2aa1020 (patch) | |
| tree | 0e2e4e44c21a6e494893e858ad22ebc0b47c0355 /include/linux | |
| parent | dbb9a7ef347828870df3e5e6ddf19469a3277fc9 (diff) | |
| parent | e2017f27b6f888fb4ebc5c9a6d984bbf2f8b99ff (diff) | |
| download | linux-f07a6e6ceb054001888e101d74036633e2aa1020.tar.xz | |
Merge branch 'dpll-expose-clock-quality-level'
Jiri Pirko says:
====================
dpll: expose clock quality level
Some device driver might know the quality of the clock it is running.
In order to expose the information to the user, introduce new netlink
attribute and dpll device op. Implement the op in mlx5 driver.
Example:
$ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml --dump device-get
[{'clock-id': 13316852727532664826,
'clock-quality-level': ['itu-opt1-eeec'], <<<<<<<<<<<<<<<<<
'id': 0,
'lock-status': 'unlocked',
'lock-status-error': 'none',
'mode': 'manual',
'mode-supported': ['manual'],
'module-name': 'mlx5_dpll',
'type': 'eec'}]
====================
Link: https://patch.msgid.link/20241030081157.966604-1-jiri@resnulli.us
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/dpll.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/dpll.h b/include/linux/dpll.h index 81f7b623d0ba..5e4f9ab1cf75 100644 --- a/include/linux/dpll.h +++ b/include/linux/dpll.h @@ -26,6 +26,10 @@ struct dpll_device_ops { struct netlink_ext_ack *extack); int (*temp_get)(const struct dpll_device *dpll, void *dpll_priv, s32 *temp, struct netlink_ext_ack *extack); + int (*clock_quality_level_get)(const struct dpll_device *dpll, + void *dpll_priv, + unsigned long *qls, + struct netlink_ext_ack *extack); }; struct dpll_pin_ops { |