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authorKory Maincent (TI.com) <kory.maincent@bootlin.com>2025-12-18 18:06:28 +0300
committerLee Jones <lee@kernel.org>2026-01-22 17:22:54 +0300
commitd3fcf276b501a82d4504fd5b1ed40249546530d1 (patch)
treef4e36a61771b8c778d53cd277f8befa873052346 /include/linux
parent05995af05b958dc22cb3b28a8d2ee0e79c7b4484 (diff)
downloadlinux-d3fcf276b501a82d4504fd5b1ed40249546530d1.tar.xz
mfd: tps65219: Implement LOCK register handling for TPS65214
The TPS65214 PMIC variant has a LOCK_REG register that prevents writes to nearly all registers when locked. Unlock the registers at probe time and leave them unlocked permanently. This approach is justified because: - Register locking is very uncommon in typical system operation - No code path is expected to lock the registers during runtime - Adding a custom regmap write function would add overhead to every register write, including voltage changes triggered by CPU OPP transitions from the cpufreq governor which could happen quite frequently Cc: stable@vger.kernel.org Fixes: 7947219ab1a2d ("mfd: tps65219: Add support for TI TPS65214 PMIC") Reviewed-by: Andrew Davis <afd@ti.com> Signed-off-by: Kory Maincent (TI.com) <kory.maincent@bootlin.com> Link: https://patch.msgid.link/20251218-fix_tps65219-v5-1-8bb511417f3a@bootlin.com Signed-off-by: Lee Jones <lee@kernel.org>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/mfd/tps65219.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/mfd/tps65219.h b/include/linux/mfd/tps65219.h
index 55234e771ba7..3abf937191d0 100644
--- a/include/linux/mfd/tps65219.h
+++ b/include/linux/mfd/tps65219.h
@@ -149,6 +149,8 @@ enum pmic_id {
#define TPS65215_ENABLE_LDO2_EN_MASK BIT(5)
#define TPS65214_ENABLE_LDO1_EN_MASK BIT(5)
#define TPS65219_ENABLE_LDO4_EN_MASK BIT(6)
+/* Register Unlock */
+#define TPS65214_LOCK_ACCESS_CMD 0x5a
/* power ON-OFF sequence slot */
#define TPS65219_BUCKS_LDOS_SEQUENCE_OFF_SLOT_MASK GENMASK(3, 0)
#define TPS65219_BUCKS_LDOS_SEQUENCE_ON_SLOT_MASK GENMASK(7, 4)