diff options
| author | Paolo Abeni <pabeni@redhat.com> | 2024-02-01 17:39:46 +0300 |
|---|---|---|
| committer | Paolo Abeni <pabeni@redhat.com> | 2024-02-01 17:39:47 +0300 |
| commit | cacfd6bfc381ce0e71dfb4ab902ca0fb0e1abe0f (patch) | |
| tree | fdf632f4f2dd2f7bd0dca938829d3139b0966989 /include/linux | |
| parent | 644c64318de0df5f4ea9f00e4b8cc262b343a93f (diff) | |
| parent | 2c54a4d71246379f4ffb9beb6a780f9a49fdfc24 (diff) | |
| download | linux-cacfd6bfc381ce0e71dfb4ab902ca0fb0e1abe0f.tar.xz | |
Merge branch 'dpll-expose-lock-status-error-value-to-user'
Jiri Pirko says:
====================
dpll: expose lock status error value to user
From: Jiri Pirko <jiri@nvidia.com>
Allow to expose lock status errort value over new DPLL generic netlink
attribute. Extend the lock_status_get() op by new argument to get the
value from the driver. Implement this new argument fill-up
in mlx5 driver.
====================
Link: https://lore.kernel.org/r/20240130120831.261085-1-jiri@resnulli.us
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/dpll.h | 1 | ||||
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 8 |
2 files changed, 9 insertions, 0 deletions
diff --git a/include/linux/dpll.h b/include/linux/dpll.h index 9cf896ea1d41..9cb02ad73d51 100644 --- a/include/linux/dpll.h +++ b/include/linux/dpll.h @@ -19,6 +19,7 @@ struct dpll_device_ops { enum dpll_mode *mode, struct netlink_ext_ack *extack); int (*lock_status_get)(const struct dpll_device *dpll, void *dpll_priv, enum dpll_lock_status *status, + enum dpll_lock_status_error *status_error, struct netlink_ext_ack *extack); int (*temp_get)(const struct dpll_device *dpll, void *dpll_priv, s32 *temp, struct netlink_ext_ack *extack); diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index c726f90ab752..6c44f107b8ba 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -12705,6 +12705,14 @@ enum mlx5_msees_oper_status { MLX5_MSEES_OPER_STATUS_FAIL_FREE_RUNNING = 0x5, }; +enum mlx5_msees_failure_reason { + MLX5_MSEES_FAILURE_REASON_UNDEFINED_ERROR = 0x0, + MLX5_MSEES_FAILURE_REASON_PORT_DOWN = 0x1, + MLX5_MSEES_FAILURE_REASON_TOO_HIGH_FREQUENCY_DIFF = 0x2, + MLX5_MSEES_FAILURE_REASON_NET_SYNCHRONIZER_DEVICE_ERROR = 0x3, + MLX5_MSEES_FAILURE_REASON_LACK_OF_RESOURCES = 0x4, +}; + struct mlx5_ifc_msees_reg_bits { u8 reserved_at_0[0x8]; u8 local_port[0x8]; |