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authorEnder Hsieh <andhsieh@nvidia.com>2026-05-05 08:05:41 +0300
committerAndrew Jeffery <andrew@codeconstruct.com.au>2026-05-18 09:30:08 +0300
commitae326783b7777b87d1722c4a9d280b6e64b37815 (patch)
treed655b1f7db4d5c62f5ddfd90e4411532f1291f10 /include/linux
parent79fb6e46a92003b9aed5391218e1e27b12147b94 (diff)
downloadlinux-ae326783b7777b87d1722c4a9d280b6e64b37815.tar.xz
ARM: dts: aspeed: msx4: enable BMC networking via MAC0
Add &mac0, &mdio3, and the ethphy3 PHY node to enable BMC networking on the AST2600-based NVIDIA MSX4 board. The PHY is attached to MDIO3 at address 2 and uses RGMII with PHY-internal delays. These nodes were intentionally omitted in commit f28674fab34f ("ARM: dts: aspeed: Add NVIDIA MSX4 HPM") at Andrew Lunn's request, pending clarification of the RGMII delay handling. Following his guidance on linux-aspeed, the bootloader has been modified to stop enabling MAC clock delays on the SoC side, so phy-mode = "rgmii-id" correctly results in the PHY adding the required ~2ns delay without any double-delay from the MAC controller. The corresponding U-Boot change has been submitted to openbmc/u-boot. Link: https://patch.msgid.link/eac09481-0ba1-4ac2-ad8c-d859822ff0d5@lunn.ch Link: https://patch.msgid.link/20260504044702.2613879-1-andhsieh@nvidia.com Cc: Andrew Lunn <andrew@lunn.ch> Cc: Marc Olberding <molberding@nvidia.com> Signed-off-by: Ender Hsieh <andhsieh@nvidia.com> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
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