iio: adc: ad4030: Add SPI offload support

AD4030 and similar ADCs can capture data at sample rates up to 2 mega
samples per second (MSPS). Not all SPI controllers are able to achieve such
high throughputs and even when the controller is fast enough to run
transfers at the required speed, it may be costly to the CPU to handle
transfer data at such high sample rates. Add SPI offload support for AD4030
and similar ADCs to enable data capture at maximum sample rates.

Note that a pair of PWM devices are used for the supported setup. One of
the PWM goes to the ADC CNV pin to initiate conversions while the other PWM
is connected to the SPI offload trigger to signal when to fetch data from
the peripheral. Note also that the PWMs must be somewhat synchronized such
to make the controller run transfers only when ADC sample data is
available. See Documentation/iio/ad4030.rst for details.

Reviewed-by: David Lechner <dlechner@baylibre.com>
Co-developed-by: Trevor Gamblin <tgamblin@baylibre.com>
Signed-off-by: Trevor Gamblin <tgamblin@baylibre.com>
Co-developed-by: Axel Haslam <ahaslam@baylibre.com>
Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

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