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| author | Stephen Boyd <sboyd@kernel.org> | 2018-03-16 19:09:49 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2018-03-16 19:09:49 +0300 |
| commit | 91fab9d26bcbf8614c2389ead327aa704768b639 (patch) | |
| tree | f679ff477ef905b4a5b33938842517f94c5e8b67 /include/linux | |
| parent | 7928b2cbe55b2a410a0f5c1f154610059c57b1b2 (diff) | |
| parent | c35b518f9ba06c9de79fb3ff62eed7462d804995 (diff) | |
| download | linux-91fab9d26bcbf8614c2389ead327aa704768b639.tar.xz | |
Merge tag 'tegra-for-4.17-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-tegra
Pull tegra clk driver updates from Thierry Reding:
This contains preliminary work for the MBIST workaround implemented in
the Tegra PMC driver. There's also some fixes to various clocks for bugs
that went unnoticed for a long time.
* tag 'tegra-for-4.17-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
clk: tegra: Fix pll_u rate configuration
clk: tegra: Specify VDE clock rate
clk: tegra20: Correct PLL_C_OUT1 setup
clk: tegra: Mark HCLK, SCLK and EMC as critical
clk: tegra: MBIST work around for Tegra210
clk: tegra: add fence_delay for clock registers
clk: tegra: Add la clock for Tegra210
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/clk/tegra.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/clk/tegra.h b/include/linux/clk/tegra.h index d23c9cf26993..afb9edfa5d58 100644 --- a/include/linux/clk/tegra.h +++ b/include/linux/clk/tegra.h @@ -128,5 +128,6 @@ extern void tegra210_sata_pll_hw_sequence_start(void); extern void tegra210_set_sata_pll_seq_sw(bool state); extern void tegra210_put_utmipll_in_iddq(void); extern void tegra210_put_utmipll_out_iddq(void); +extern int tegra210_clk_handle_mbist_war(unsigned int id); #endif /* __LINUX_CLK_TEGRA_H_ */ |