diff options
| author | Biju Das <biju.das.jz@bp.renesas.com> | 2025-07-30 19:46:14 +0300 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2025-08-19 15:34:14 +0300 |
| commit | 74f44ad07d1063933c237a7db16f6a4036643d60 (patch) | |
| tree | 3fa3ea7d39e01b2b8c3d2da562499c09f18ff305 /include/linux | |
| parent | 9c174e4dacee9fb2014a4ffc953d79a5707b77e4 (diff) | |
| download | linux-74f44ad07d1063933c237a7db16f6a4036643d60.tar.xz | |
mmc: tmio: Add 64-bit read/write support for SD_BUF0 in polling mode
As per the RZ/{G2L,G3E} HW manual SD_BUF0 can be accessed by 16/32/64
bits. Most of the data transfer in SD/SDIO/eMMC mode is more than 8 bytes.
During testing it is found that, if the DMA buffer is not aligned to 128
bit it fallback to PIO mode. In such cases, 64-bit access is much more
efficient than the current 16-bit.
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20250730164618.233117-2-biju.das.jz@bp.renesas.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/platform_data/tmio.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/platform_data/tmio.h b/include/linux/platform_data/tmio.h index b060124ba1ae..426291713b83 100644 --- a/include/linux/platform_data/tmio.h +++ b/include/linux/platform_data/tmio.h @@ -47,6 +47,9 @@ /* Some controllers have a CBSY bit */ #define TMIO_MMC_HAVE_CBSY BIT(11) +/* Some controllers have a 64-bit wide data port register */ +#define TMIO_MMC_64BIT_DATA_PORT BIT(12) + struct tmio_mmc_data { void *chan_priv_tx; void *chan_priv_rx; |