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| author | Mark Brown <broonie@kernel.org> | 2025-07-03 19:02:43 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2025-07-03 19:02:43 +0300 |
| commit | 51106b830ad9dc0a2cf932e27a921e01de2df876 (patch) | |
| tree | 6cd9a13c4b3ad5a737373af62aeb8bd49e910d23 /include/linux | |
| parent | 7105fdd54a14bee49371b39374a61b3c967d74cb (diff) | |
| parent | 913bf8d50cbd144c87e9660b591781179182ff59 (diff) | |
| download | linux-51106b830ad9dc0a2cf932e27a921e01de2df876.tar.xz | |
spi: spi-qpic-snand: enable 8 bits ECC strength
Merge series from Gabor Juhos <j4g8y7@gmail.com>:
This small patch set adds support for 8 bits ECC strength, which widens
the range of the usable SPI NAND chips with the driver.
The first one is a preparatory patch which adds some defines which
allows to avoid using magic values, and the second patch implements
the actual support.
The series should be integrated via the SPI tree, as that contains
prerequisite changes.
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/mtd/nand-qpic-common.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/mtd/nand-qpic-common.h b/include/linux/mtd/nand-qpic-common.h index e8462deda6db..0d944db363cd 100644 --- a/include/linux/mtd/nand-qpic-common.h +++ b/include/linux/mtd/nand-qpic-common.h @@ -101,6 +101,8 @@ #define ECC_SW_RESET BIT(1) #define ECC_MODE 4 #define ECC_MODE_MASK GENMASK(5, 4) +#define ECC_MODE_4BIT 0 +#define ECC_MODE_8BIT 1 #define ECC_PARITY_SIZE_BYTES_BCH 8 #define ECC_PARITY_SIZE_BYTES_BCH_MASK GENMASK(12, 8) #define ECC_NUM_DATA_BYTES 16 |