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| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2025-04-03 12:19:14 +0300 |
|---|---|---|
| committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2025-04-29 12:05:03 +0300 |
| commit | 429330cd1cfe860133d1fbdd49e9e081524333cf (patch) | |
| tree | 30449ba09351fc66c98c8ecd6595a82e033fb7a7 /include/linux | |
| parent | 2a294fa215289aff4b7b0c0a70f24dcd621df497 (diff) | |
| download | linux-429330cd1cfe860133d1fbdd49e9e081524333cf.tar.xz | |
mtd: spinand: Use more specific naming for the get/set feature ops
SPI operations have been initially described through macros implicitly
implying the use of a single SPI SDR bus. Macros for supporting dual and
quad I/O transfers have been added on top, generally inspired by vendor
naming, followed by DTR operations. Soon we might see octal
and even octal DTR operations as well (including the opcode byte).
Let's clarify what the macro really mean by describing the expected bus
topology in the get/set feature macro names.
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
[Miquel: Fixed conflicts with -next by updating macronix driver]
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/mtd/spinand.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index dfb5c74cad6d..8ea40d838dc2 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -38,13 +38,13 @@ SPI_MEM_OP_DUMMY(ndummy, 1), \ SPI_MEM_OP_DATA_IN(len, buf, 1)) -#define SPINAND_SET_FEATURE_OP(reg, valptr) \ +#define SPINAND_SET_FEATURE_1S_1S_1S_OP(reg, valptr) \ SPI_MEM_OP(SPI_MEM_OP_CMD(0x1f, 1), \ SPI_MEM_OP_ADDR(1, reg, 1), \ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_DATA_OUT(1, valptr, 1)) -#define SPINAND_GET_FEATURE_OP(reg, valptr) \ +#define SPINAND_GET_FEATURE_1S_1S_1S_OP(reg, valptr) \ SPI_MEM_OP(SPI_MEM_OP_CMD(0x0f, 1), \ SPI_MEM_OP_ADDR(1, reg, 1), \ SPI_MEM_OP_NO_DUMMY, \ |