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authorYao Zi <me@ziyao.cc>2026-02-02 07:53:22 +0300
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2026-02-05 12:01:19 +0300
commit3989ed41848346ea887bff5d53e3657be42b609c (patch)
tree6e64f9a85f2f8eba5c31ee28b1427e772cbd45c9 /include/linux
parent32ec465103527ede09b640cd0ab0636dc58827fb (diff)
downloadlinux-3989ed41848346ea887bff5d53e3657be42b609c.tar.xz
MIPS: Loongson64: env: Fixup serial clock-frequency when using LEFI
When booting from LEFI firmware, the devicetree is chosen by matching bridge type and CPU PRID. However, serials on Loongson devices may not have the same clock frequency across different boards. For example, CPU UARTs found on Loongson 3A4000 is supplied by the system clock, which may be either 25MHz or 100MHz. Luckily, LEFI firmware interface provides information about UART address and corresponding clock frequency. Let's fixup clock-frequency properties for serials after FDT selection by matching FDT nodes with addresses provided by firmware. Signed-off-by: Yao Zi <me@ziyao.cc> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'include/linux')
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