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authorNicolin Chen <nicolinc@nvidia.com>2025-07-10 08:59:06 +0300
committerJason Gunthorpe <jgg@nvidia.com>2025-07-11 17:09:26 +0300
commit2238ddc2b0560734c2dabb1c1fb4b342b5193625 (patch)
tree4d176fc409138484a77c0689c860f70d28eaa8bb /include/linux
parente2e9360022585c21dc30d2b19f5866c252f40806 (diff)
downloadlinux-2238ddc2b0560734c2dabb1c1fb4b342b5193625.tar.xz
iommufd/viommu: Add IOMMUFD_CMD_HW_QUEUE_ALLOC ioctl
Introduce a new IOMMUFD_CMD_HW_QUEUE_ALLOC ioctl for user space to allocate a HW QUEUE object for a vIOMMU specific HW-accelerated queue, e.g.: - NVIDIA's Virtual Command Queue - AMD vIOMMU's Command Buffer, Event Log Buffers, and PPR Log Buffers Since this is introduced with NVIDIA's VCMDQs that access the guest memory in the physical address space, add an iommufd_hw_queue_alloc_phys() helper that will create an access object to the queue memory in the IOAS, to avoid the mappings of the guest memory from being unmapped, during the life cycle of the HW queue object. AMD's HW will need an hw_queue_init op that is mutually exclusive with the hw_queue_init_phys op, and their case will bypass the access part, i.e. no iommufd_hw_queue_alloc_phys() call. Link: https://patch.msgid.link/r/dab4ace747deb46c1fe70a5c663307f46990ae56.1752126748.git.nicolinc@nvidia.com Reviewed-by: Pranjal Shrivastava <praan@google.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> Signed-off-by: Nicolin Chen <nicolinc@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/iommufd.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/iommufd.h b/include/linux/iommufd.h
index f13f3ca6adb5..ce4011a2fc27 100644
--- a/include/linux/iommufd.h
+++ b/include/linux/iommufd.h
@@ -123,6 +123,7 @@ struct iommufd_vdevice {
struct iommufd_hw_queue {
struct iommufd_object obj;
struct iommufd_viommu *viommu;
+ struct iommufd_access *access;
u64 base_addr; /* in guest physical address space */
size_t length;