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| author | Gabor Juhos <j4g8y7@gmail.com> | 2025-07-02 15:35:23 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2025-07-02 19:02:42 +0300 |
| commit | 0dc7e656ddd54c3267b7cc18c1ac8ec1297ed02f (patch) | |
| tree | a2516314e0cf03ea17a7d3b09c1a7fbf71f0ac1a /include/linux | |
| parent | d2c0e95525216cdc695d0066ee2f70b8adfbc536 (diff) | |
| download | linux-0dc7e656ddd54c3267b7cc18c1ac8ec1297ed02f.tar.xz | |
mtd: nand: qpic-common: add defines for ECC_MODE values
Add defines for the values of the ECC_MODE field of the NAND_DEV0_ECC_CFG
register and change both the 'qcom-nandc' and 'spi-qpic-snand' drivers to
use those instead of magic numbers.
No functional changes. This is in preparation for adding 8 bit ECC strength
support for the 'spi-qpic-snand' driver.
Reviewed-by: Md Sadre Alam <quic_mdalam@quicinc.com>
Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://patch.msgid.link/20250702-qpic-snand-8bit-ecc-v2-1-ae2c17a30bb7@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/mtd/nand-qpic-common.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/mtd/nand-qpic-common.h b/include/linux/mtd/nand-qpic-common.h index e8462deda6db..0d944db363cd 100644 --- a/include/linux/mtd/nand-qpic-common.h +++ b/include/linux/mtd/nand-qpic-common.h @@ -101,6 +101,8 @@ #define ECC_SW_RESET BIT(1) #define ECC_MODE 4 #define ECC_MODE_MASK GENMASK(5, 4) +#define ECC_MODE_4BIT 0 +#define ECC_MODE_8BIT 1 #define ECC_PARITY_SIZE_BYTES_BCH 8 #define ECC_PARITY_SIZE_BYTES_BCH_MASK GENMASK(12, 8) #define ECC_NUM_DATA_BYTES 16 |