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| author | Marek Vasut <marek.vasut+renesas@mailbox.org> | 2026-05-05 06:42:52 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-05-31 11:41:55 +0300 |
| commit | 0b99c3aa40e7fa98f28a966d96967b5e50946f91 (patch) | |
| tree | 0c9e80b6eb497cf997c19d019128c5b90f99e378 /include/linux | |
| parent | 0a5e30c062da53053f5ac7b55a6b1993df8f5fe4 (diff) | |
| download | linux-0b99c3aa40e7fa98f28a966d96967b5e50946f91.tar.xz | |
arm64: dts: renesas: gray-hawk: Specify ethernet PHY reset timings
The KSZ9031RNX reference manual [1] DS00002117K page 62 FIGURE 7-5:
POWER-UP/POWER-DOWN/RESET TIMING Note 2 states, that after the
de-assertion of reset, wait a minimum of 100 us before starting
programming on the MIIM (MDC/MDIO) interface. Set DT property
reset-deassert-us to three times that, 300 us, to provide ample
time between reset deassertion and MDIO access.
The KSZ9031RNX reference manual [1] DS00002117K page 62 TABLE 7-4:
POWER-UP/POWER-DOWN/RESET TIMING PARAMETERS row tSR Stable supply
voltages to de-assertion of reset is at minimum 10 ms. Set DT
property reset-assert-us to 10ms because the KSZ9031RNX RM does
not explicitly spell out how long the reset has to be asserted,
but this at least covers the worst case scenario.
[1] https://ww1.microchip.com/downloads/aemDocuments/documents/UNG/ProductDocuments/DataSheets/KSZ9031RNX-Data-Sheet-DS00002117.pdf
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260505034325.167797-12-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'include/linux')
0 files changed, 0 insertions, 0 deletions
