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authorSung Lee <sung.lee@amd.com>2020-09-24 23:21:21 +0300
committerAlex Deucher <alexander.deucher@amd.com>2020-10-05 22:17:13 +0300
commitb98ab70e748e54b6b53abc2a20380ceb01e421fc (patch)
treee9bd480289a0baf5e722cd7079b6e2eeca44954a /include/linux/vmalloc.h
parent5dff371a7351a7e9cbb06bca9e532db16594c053 (diff)
downloadlinux-b98ab70e748e54b6b53abc2a20380ceb01e421fc.tar.xz
drm/amd/display: Hardcode 45W Bounding Box for DCN2.1 Diags
[WHY] Currently construction of clock limits gets skipped for diags. This logic would be useful to get tested in diags. [HOW] Copy existing states to clk_table such that update_bw_bounding_box logic gets used to fill the table. Signed-off-by: Sung Lee <sung.lee@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/linux/vmalloc.h')
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