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authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>2026-05-27 23:24:30 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2026-05-31 11:52:23 +0300
commitf4418ce75760e5f546a1bdd0876056febc430b1f (patch)
tree37f038868fe47cfa5dacbbf1e01ff82fa61b6e08 /include/linux/timerqueue.h
parent8fa0a1ae4f434be1b8ea6223636c065c8e39d09b (diff)
downloadlinux-f4418ce75760e5f546a1bdd0876056febc430b1f.tar.xz
arm64: dts: renesas: rzt2h-n2h-evk: Enable xSPI nodes
Enable the xSPI0 and xSPI1 controllers on the RZ/T2H N2H EVK board. Configure the xSPI0 controller interface to 1-bit (x1) mode, even though the connected MX25LW51245 octal flash device supports octal mode. Add a corresponding inline hardware comment detailing this restriction; operating in octal mode causes the BootROM to fail loading the first-stage bootloader following a Watchdog Timer (WDT) reset. Configure the xSPI1 controller interface connected to the AT25SF128A flash device for 4-bit (x4) mode to utilize all available data lines. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260527202430.606341-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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