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| author | Biju Das <biju.das.jz@bp.renesas.com> | 2026-05-28 10:45:44 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-05-31 11:52:23 +0300 |
| commit | 80e32321c3df7bec3029725c526935493939f34c (patch) | |
| tree | 403ba5f5d8985d169e39dced1cec3858503dbb61 /include/linux/timerqueue.h | |
| parent | 3f9c7afdfa60eb726c7f8fb8529ab6519a104db8 (diff) | |
| download | linux-80e32321c3df7bec3029725c526935493939f34c.tar.xz | |
arm64: dts: renesas: rzg3l-smarc-som: Enable Versa clock generator
The RZ/G3L SMARC SoM has a Versa 5P35023B clock generator to generate
the following clocks:
- ref: Not connected,
- se1: AUDIO_MCK (11.2896 or 12.2880 MHz),
- se2: RZ_AUDIO_CLK_B (11.2896 MHz),
- se3: RZ_AUDIO_CLK_C (12.2880 MHz),
- diff{1,1B}: ET{0,1}_PHY_CLK (25 MHz),
- diff2{2,2B}: Not connected.
Enable the Vversa 5P35023B clock generator on the RZ/G3L SoM DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260528074615.91110-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'include/linux/timerqueue.h')
0 files changed, 0 insertions, 0 deletions