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authorImre Deak <imre.deak@intel.com>2025-11-17 13:46:01 +0300
committerMika Kahola <mika.kahola@intel.com>2025-11-19 14:32:26 +0300
commit2a6e417907593e908d164c743f812ad6413f3d7b (patch)
treefba68257630827ed5fd9f3daff617e1b4bb9d95c /include/linux/timerqueue.h
parent6b566d066c823a9ad1ec5a7043955349a71ce42b (diff)
downloadlinux-2a6e417907593e908d164c743f812ad6413f3d7b.tar.xz
drm/i915/cx0: Add MTL+ Thunderbolt PLL hooks
Add the PLL hooks for the TBT PLL on MTL+. These are simple stubs similarly to the TBT PLL on earlier platforms, since this PLL is always on from the display POV - so no PLL enable/disable programming is required as opposed to the non-TBT PLLs - and the clocks for different link rates are enabled/disabled at a different level, via the intel_encoder::enable_clock()/disable_clock() interface. Signed-off-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://lore.kernel.org/r/20251117104602.2363671-32-mika.kahola@intel.com
Diffstat (limited to 'include/linux/timerqueue.h')
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