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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2016-08-17 22:41:44 +0300
committerChris Wilson <chris@chris-wilson.co.uk>2016-08-22 13:28:58 +0300
commit1f061316cf556fe07804ca2eb30f7807cffc3f53 (patch)
tree9cdfba4c3657d450ca6408e4f979090a8696b813 /include/linux/timerqueue.h
parentc75870d86f6a55a08ef0e67cf6cc25ae124ca9e7 (diff)
downloadlinux-1f061316cf556fe07804ca2eb30f7807cffc3f53.tar.xz
drm/i915: Call intel_fbc_pre_update() after pinning the new pageflip
intel_fbc_pre_update() depends upon the new state being already pinned in place in the Global GTT (primarily for both fencing which wants both an offset and a fence register, if assigned). This requires the call to intel_fbc_pre_update() be after intel_pin_and_fence_fb() - but commit e8216e502aca ("drm/i915/fbc: call intel_fbc_pre_update earlier during page flips") moved the code way too much up in its attempt to call it before the page flip. v2 (from Paulo): - Point the original bad commit. - Add a comment to maybe prevent further regressions. Fixes: e8216e502aca ("drm/i915/fbc: call intel_fbc_pre_update earlier...") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Patrik Jakobsson <patrik.jakobsson@linux.intel.com> Cc: drm-intel-fixes@lists.freedesktop.org Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: http://patchwork.freedesktop.org/patch/msgid/1471462904-842-1-git-send-email-paulo.r.zanoni@intel.com Cc: stable@vger.kernel.org
Diffstat (limited to 'include/linux/timerqueue.h')
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