diff options
| author | Grant Likely <grant.likely@secretlab.ca> | 2010-12-30 08:20:30 +0300 |
|---|---|---|
| committer | Grant Likely <grant.likely@secretlab.ca> | 2010-12-30 08:21:47 +0300 |
| commit | d392da5207352f09030e95d9ea335a4225667ec0 (patch) | |
| tree | 7d6cd1932afcad0a5619a5c504a6d93ca318187c /include/linux/serial_reg.h | |
| parent | e39d5ef678045d61812c1401f04fe8edb14d6359 (diff) | |
| parent | 387c31c7e5c9805b0aef8833d1731a5fe7bdea14 (diff) | |
| download | linux-d392da5207352f09030e95d9ea335a4225667ec0.tar.xz | |
Merge v2.6.37-rc8 into powerpc/next
Diffstat (limited to 'include/linux/serial_reg.h')
| -rw-r--r-- | include/linux/serial_reg.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h index cf9327c051ad..c7a0ce11cd47 100644 --- a/include/linux/serial_reg.h +++ b/include/linux/serial_reg.h @@ -221,8 +221,24 @@ #define UART_FCR_PXAR16 0x80 /* receive FIFO threshold = 16 */ #define UART_FCR_PXAR32 0xc0 /* receive FIFO threshold = 32 */ +/* + * Intel MID on-chip HSU (High Speed UART) defined bits + */ +#define UART_FCR_HSU_64_1B 0x00 /* receive FIFO treshold = 1 */ +#define UART_FCR_HSU_64_16B 0x40 /* receive FIFO treshold = 16 */ +#define UART_FCR_HSU_64_32B 0x80 /* receive FIFO treshold = 32 */ +#define UART_FCR_HSU_64_56B 0xc0 /* receive FIFO treshold = 56 */ + +#define UART_FCR_HSU_16_1B 0x00 /* receive FIFO treshold = 1 */ +#define UART_FCR_HSU_16_4B 0x40 /* receive FIFO treshold = 4 */ +#define UART_FCR_HSU_16_8B 0x80 /* receive FIFO treshold = 8 */ +#define UART_FCR_HSU_16_14B 0xc0 /* receive FIFO treshold = 14 */ +#define UART_FCR_HSU_64B_FIFO 0x20 /* chose 64 bytes FIFO */ +#define UART_FCR_HSU_16B_FIFO 0x00 /* chose 16 bytes FIFO */ +#define UART_FCR_HALF_EMPT_TXI 0x00 /* trigger TX_EMPT IRQ for half empty */ +#define UART_FCR_FULL_EMPT_TXI 0x08 /* trigger TX_EMPT IRQ for full empty */ /* * These register definitions are for the 16C950 |