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authorDapeng Mi <dapeng1.mi@linux.intel.com>2026-01-14 04:17:48 +0300
committerPeter Zijlstra <peterz@infradead.org>2026-01-15 12:04:27 +0300
commitc847a208f43bfeb56943f2ca6fe2baf1db9dee7a (patch)
tree439a4e69dff99787a6ad935c2dd0bd12b0f37c9a /include/linux/root_dev.h
parent7cd264d1972d13177acc1ac9fb11ee0a7003e2e6 (diff)
downloadlinux-c847a208f43bfeb56943f2ca6fe2baf1db9dee7a.tar.xz
perf/x86/intel: Add core PMU support for Novalake
This patch enables core PMU support for Novalake, covering both P-core and E-core. It includes Arctic Wolf-specific counters and PEBS constraints, and the model-specific OMR extra registers table. Since Coyote Cove shares the same PMU capabilities as Panther Cove, the existing Panther Cove PMU enabling functions are reused for Coyote Cove. For detailed information about counter constraints, please refer to section 16.3 "COUNTER RESTRICTIONS" in the ISE documentation. Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20260114011750.350569-6-dapeng1.mi@linux.intel.com
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