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authorMukesh Ojha <mukesh.ojha@oss.qualcomm.com>2026-05-27 12:54:23 +0300
committerThomas Gleixner <tglx@kernel.org>2026-06-03 19:27:05 +0300
commit668f3382845b3751220c6fcdd4c4cda0c2f0c78f (patch)
tree1c73336b215a6978f195edb7b07d2b7561bb8c05 /include/linux/processor.h
parent6fe450074626eaab3def4b3e8c1819d46d2d682c (diff)
downloadlinux-668f3382845b3751220c6fcdd4c4cda0c2f0c78f.tar.xz
irqchip/qcom-pdc: Split __pdc_enable_intr() into per-version helpers
The __pdc_enable_intr() function contains a version branch that selects between two distinct enable mechanisms: a bank-based IRQ_ENABLE_BANK register for HW < 3.2, and a per-pin enable bit in IRQ_i_CFG for HW >= 3.2. These two paths share no code and serve different hardware. Split them into two focused static functions: pdc_enable_intr_bank() for HW < 3.2 and pdc_enable_intr_cfg() for HW >= 3.2. No functional change. Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://patch.msgid.link/20260527095426.2324504-2-mukesh.ojha@oss.qualcomm.com
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