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authorLucas De Marchi <lucas.demarchi@intel.com>2025-02-28 17:54:14 +0300
committerLucas De Marchi <lucas.demarchi@intel.com>2025-02-28 17:54:14 +0300
commit0410c6121529409b08e81a77ae3ee58c657e2243 (patch)
treebc9da8b17b25dba10227dd658fce2dbf8adaad7c /include/linux/memory
parentba757a65d2a28d46a8ccf50538f4f05036983f1b (diff)
parent33e26f3544a558e7476eb221ff33173759b3a116 (diff)
downloadlinux-0410c6121529409b08e81a77ae3ee58c657e2243.tar.xz
Merge drm/drm-next into drm-xe-next
Sync to fix conlicts between drm-xe-next and drm-intel-next. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Diffstat (limited to 'include/linux/memory')
-rw-r--r--include/linux/memory/ti-aemif.h32
1 files changed, 32 insertions, 0 deletions
diff --git a/include/linux/memory/ti-aemif.h b/include/linux/memory/ti-aemif.h
new file mode 100644
index 000000000000..da94a9d985e7
--- /dev/null
+++ b/include/linux/memory/ti-aemif.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __MEMORY_TI_AEMIF_H
+#define __MEMORY_TI_AEMIF_H
+
+/**
+ * struct aemif_cs_timings: structure to hold CS timing configuration
+ * values are expressed in number of clock cycles - 1
+ * @ta: minimum turn around time
+ * @rhold: read hold width
+ * @rstrobe: read strobe width
+ * @rsetup: read setup width
+ * @whold: write hold width
+ * @wstrobe: write strobe width
+ * @wsetup: write setup width
+ */
+struct aemif_cs_timings {
+ u32 ta;
+ u32 rhold;
+ u32 rstrobe;
+ u32 rsetup;
+ u32 whold;
+ u32 wstrobe;
+ u32 wsetup;
+};
+
+struct aemif_device;
+
+int aemif_set_cs_timings(struct aemif_device *aemif, u8 cs, struct aemif_cs_timings *timings);
+int aemif_check_cs_timings(struct aemif_cs_timings *timings);
+
+#endif // __MEMORY_TI_AEMIF_H