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authorJakub Kicinski <kuba@kernel.org>2025-03-06 06:02:49 +0300
committerJakub Kicinski <kuba@kernel.org>2025-03-06 06:02:50 +0300
commit89b12ca6950204c3d2199dfab2e0e28ab3259013 (patch)
tree625df8ab344932c370253e6d75f62e1f3c637a11 /include/linux/fpga/fpga-mgr.h
parentc62e6f056ea308d6382450c1cb32e41727375885 (diff)
parent7598ef621a43f0c8d4c2d0e6220c484bdb7b3ee7 (diff)
downloadlinux-89b12ca6950204c3d2199dfab2e0e28ab3259013.tar.xz
Merge branch 'enable-sgmii-and-2500basex-interface-mode-switching-for-intel-platforms'
Choong Yong Liang says: ==================== Enable SGMII and 2500BASEX interface mode switching for Intel platforms During the interface mode change, the 'phylink_major_config' function will be triggered in phylink. The modification of the following functions will support the switching between SGMII and 2500BASE-X interface modes for the Intel platform: - xpcs_switch_interface_mode: Re-initiates clause 37 auto-negotiation for the SGMII interface mode to perform auto-negotiation. - mac_finish: Configures the SerDes according to the interface mode. With the above changes, the code will work as follows during the interface mode change. The PCS will reconfigure according to the pcs_neg_mode and the selected interface mode. Then, the MAC driver will perform SerDes configuration in 'mac_finish' based on the selected interface mode. During the SerDes configuration, the selected interface mode will identify TSN lane registers from FIA and then send IPC commands to the Power Management Controller (PMC) through the PMC driver/API. The PMC will act as a proxy to program the PLL registers. ==================== Link: https://patch.msgid.link/20250227121522.1802832-1-yong.liang.choong@linux.intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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